Abstract: A recording apparatus includes a support unit including a support surface configured to support a medium, a recording unit configured to perform recording on the medium supported by the support unit, and a projection unit configured to project an image onto the support surface. The projection unit includes an irradiation unit configured to irradiate the support surface with light, and a light blocking portion configured to block a part of the light emitted from the irradiation unit. The light blocking portion includes at least one light blocking region configured to block the part of the light emitted from the irradiation unit. The projection unit is configured to project a reference position image indicating a reference position of the medium supported by the support surface onto the support surface by blocking the part of the light emitted by the irradiation unit with the at least one light blocking region.

Abstract: A gate of the first p-type MOS transistor and the first and second control circuits are electrically coupled to a first node. The first control circuit lowers a voltage or the first node between a first time and a second time at which the first p-type MOS transistor is off. The second control circuit lowers the voltage of the first node between a third time and a fourth time at which the first p-type MOS transistor is on. The second time is later than the first time. The fourth time is later than the second and third times. The first p-type MOS transistor is turned on during a first period. A voltage decrease amount of the first node per unit time in the first control circuit is greater than that in the second control circuit.

Abstract: A gate of the first p-type MOS transistor and the first and second control circuits are electrically coupled to a first node. The first control circuit lowers a voltage or the first node between a first time and a second time at which the first p-type MOS transistor is off. The second control circuit lowers the voltage of the first node between a third time and a fourth time at which the first p-type MOS transistor is on. The second time is later than the first time. The fourth time is later than the second and third times. The first p-type MOS transistor is turned on during a first period. A voltage decrease amount of the first node per unit time in the first control circuit is greater than that in the second control circuit.

Abstract: According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.

Abstract: According to one embodiment, a semiconductor device includes a first switch element including a first end to which a first voltage is applied, and a second end and a gate electrically coupled to a first node, a second switch element including a first end to which a second voltage is applied, and a second end and a gate electrically coupled to the first node, a third switch element including a first end to which the second voltage is applied, a second end electrically coupled to a second node, and a gate coupled to the first node, a fourth switch element including a gate coupled to the second node, and a first terminal electrically coupled to a first end of the fourth switch element and outputting a signal based on a voltage of the second node.

Abstract: Switch circuitry comprise a boosting circuit, a first switch, and a second switch. The boosting circuit boosts an input voltage. The first switch includes an input part to which the input voltage is applied, an output part which outputs an output voltage based on a voltage applied to the input part, and a driving part to which a driving voltage is applied, the first switch in which a voltage which the boosting circuit outputs is applied to the driving part and which outputs the output voltage based on the input voltage when the input voltage is higher than the output voltage. The second switch short-circuits the driving part of the first switch and the input part of the first switch when a value obtained by subtracting the input voltage from a voltage applied to the driving part exceeds a driving threshold.

Abstract: According to one embodiment, a semiconductor device includes a first circuit configured to generate a first voltage, a second circuit configured to transfer the generated first voltage to a first terminal, and a third circuit configured to generate a first signal that demonstrates a first level when a voltage at the first terminal is higher than or equal to a threshold voltage, and a second level when the voltage of the first terminal is lower than the threshold voltage, wherein the second circuit is configured to interrupt transfer of the first voltage, based on the first signal at the second level.

Abstract: According to the present embodiment, a semiconductor integrated circuit is a semiconductor integrated circuit that drives a switching element including a first field-effect transistor and a second field-effect transistor connected to the first field-effect transistor in anti-series, and includes a driving circuit and a control circuit. The driving circuit turns on or off the first and second field-effect transistors. The control circuit controls the driving circuit in accordance with a control signal input from one signal input terminal.

Abstract: According to the present embodiment, a semiconductor integrated circuit is a semiconductor integrated circuit that drives a switching element including a first field-effect transistor and a second field-effect transistor connected to the first field-effect transistor in anti-series, and includes a driving circuit and a control circuit. The driving circuit turns on or off the first and second field-effect transistors. The control circuit controls the driving circuit in accordance with a control signal input from one signal input terminal.

Abstract: A semiconductor integrated circuit includes abnormality detectors configured to detect abnormalities in the semiconductor integrated circuit, and a reference voltage output circuit. The reference voltage output circuit includes switches controlled in accordance with detection signals from the abnormality detectors. The reference voltage output circuit is configured to output as an error signal, a reference voltage having one of a plurality of different values depending on conduction states of the switches of the reference voltage output circuit.

Abstract: A semiconductor integrated circuit includes abnormality detectors configured to detect abnormalities in the semiconductor integrated circuit, and a reference voltage output circuit. The reference voltage output circuit includes switches controlled in accordance with detection signals from the abnormality detectors. The reference voltage output circuit is configured to output as an error signal, a reference voltage having one of a plurality of different values depending on conduction states of the switches of the reference voltage output circuit.

Abstract: Switch circuitry comprise a boosting circuit, a first switch, and a second switch. The boosting circuit boosts an input voltage. The first switch includes an input part to which the input voltage is applied, an output part which outputs an output voltage based on a voltage applied to the input part, and a driving part to which a driving voltage is applied, the first switch in which a voltage which the boosting circuit outputs is applied to the driving part and which outputs the output voltage based on the input voltage when the input voltage is higher than the output voltage. The second switch short-circuits the driving part of the first switch and the input part of the first switch when a value obtained by subtracting the input voltage from a voltage applied to the driving part exceeds a driving threshold.

Abstract: A semiconductor integrated circuit includes an output circuit connected between a power supply and a node at which a load can be connected. The output circuit electrically connects and disconnects the power supply to/from the node according to a logic level of a first signal. A discharge circuit is connected between the node and a reference potential. The discharge circuit disconnects the node from the reference potential when a second signal supplied to the discharge circuit is a first level and connects the node to the reference potential when the second control signal is a second level. A discharge control circuit sets the second signal to the second level when the first signal changes to the second level from first level and then sets the second signal to the first level after a predetermined time has elapsed from a time when the first signal changes to the second level.

Abstract: A semiconductor integrated circuit includes an output circuit connected between a power supply and a node at which a load can be connected. The output circuit electrically connects and disconnects the power supply to/from the node according to a logic level of a first signal. A discharge circuit is connected between the node and a reference potential. The discharge circuit disconnects the node from the reference potential when a second signal supplied to the discharge circuit is a first level and connects the node to the reference potential when the second control signal is a second level. A discharge control circuit sets the second signal to the second level when the first signal changes to the second level from first level and then sets the second signal to the first level after a predetermined time has elapsed from a time when the first signal changes to the second level.

Abstract: An adapter is provided which is used when a process for a small-diameter semiconductor substrate (small substrate) is performed by using a semiconductor manufacturing apparatus for large-diameter silicon substrates. The small substrate is attached to an adapter plate that compensates for differences in size, so that the small substrate is prevented from falling even when the small substrate is in a vertical or inverted direction. To process the small substrate with the semiconductor manufacturing apparatus for large-diameter silicon substrates, an opening 10 is formed in a transferring base portion 1, which is formed of a large-diameter silicon substrate, and a polyimide film 2 is attached to the rear surface of the transferring base portion 1, so that the small substrate can be retained by a vacuum chuck or an electrostatic chuck.

Abstract: A driver is provided. The driver generally comprises a current source, a current mirror, an amplifier and a presetting circuit. The current source is generally adapted to provide a reference current to the current mirror. The transistor is coupled to the current mirror. The amplifier has the first input that is coupled to the current mirror, a second input that is coupled to a node between the transistor and the current mirror, and an output that is coupled to the control electrode of the transistor. The presetting circuit is coupled to the control electrode of the transistor so that it can preset the potential of the control electrode of the transistor to a potential that allows current driving of the transistor with a predetermined timing after a control signal is received.

Abstract: A driver is provided. The driver generally comprises a current source, a current mirror, an amplifier and a presetting circuit. The current source is generally adapted to provide a reference current to the current mirror. The transistor is coupled to the current mirror. The amplifier has the first input that is coupled to the current mirror, a second input that is coupled to a node between the transistor and the current mirror, and an output that is coupled to the control electrode of the transistor. The presetting circuit is coupled to the control electrode of the transistor so that it can preset the potential of the control electrode of the transistor to a potential that allows current driving of the transistor with a predetermined timing after a control signal is received.

Abstract: A gate portion constituting a gate of a resin molding die is made of a hard alloy having a hardness greater than the predetermined hardness in the iron-based hard alloy used to from a cavity block and a center block. Opposing surfaces of the cavity block halves include a silicone rubber layer at least at the portions thereof which contact portions of the lead frame in a semiconductor encapsulation molding apparatus.

Abstract: A gate portion constituting a gate of a resin molding die is made of a hard alloy having a hardness greater than the predetermined hardness in the iron-based hard alloy used to form a cavity block and a center block. Opposing surfaces of the cavity block halves include a polytetrafluoroethylene layer at least at the portions thereof which contact portions of the lead frame in a semiconductor encapsulation molding apparatus.

Abstract: A magnetically floating carrier system has a carriage body which is adapted to be floated by the attraction force of floating magnets acting upon the bottom surfaces of rails. The carriage body is driven by a linear motor. The rails are mounted on a framework extending longitudinally to define a track and having one side thereof supported. The carriage body is provided with a support member extending upwards at the other side of the framework to a point above the top surfaces of the framework. A pallet for supporting a load is mounted on the top end of the support member so as to be disposed over the framework. The carriage carries four magnets at front and rear parts thereof which are adapted to exert a force of attraction on the pair of rails. The magnets are mounted at both ends of two beams mounted on front and rear parts of the carriage body for see-saw motions and steering motions.