Abstract: A semiconductor apparatus and a method for collecting residues of curable material are provided. The semiconductor apparatus includes a chamber containing a wafer cassette, and a collecting module disposed in the chamber for collecting residues of curable material in the chamber. The collecting module includes a flow-directing structure disposed below a ceiling of the chamber, a baffle structure disposed below the flow-directing structure, and a tray disposed on the wafer cassette. The flow-directing structure includes a first hollow region, the baffle structure includes a second hollow region, and the tray is moved together with the wafer cassette to pass through the second hollow region of the baffle structure and is positioned to cover the first hollow region of the flow-directing structure.

Abstract: A method for collecting residues of curable material includes: performing a curing process on a semiconductor wafer in a chamber, where the semiconductor wafer is held by a wafer cassette, and residues of curable material is formed in the chamber; and collecting the residues of curable material. A first portion of the residues dripping from a ceiling of the chamber is directed toward a tray using a flow-directing structure, where the flow-directing structure is below the ceiling of the chamber, the flow-directing structure includes a central opening and a slanted surface sloped to direct the first portion of the residues toward the central opening. The first portion of the residues is collected on a collecting surface of the tray which covers the central opening of the flow-directing structure.

Abstract: A transistor structure includes a substrate, a source electrode, a drain electrode, a protective layer and a gate electrode. The source electrode and the drain electrode are provided on the substrate. The protective layer is provided on the substrate. The protective layer is provided between the source electrode and the drain electrode. The protective layer includes a SiNx layer and a SiOx layer. The SiOx layer is provided on the substrate, the SiNx layer is provided on the SiOx layer, and a through hole of the protective layer is formed to extend through the SiNx layer and the SiOx layer. The gate electrode is provided in the through hole, and the gate electrode is separated from at least part of the SiOx layer so as to form an air gap therebetween.

Abstract: A semiconductor apparatus and a method for collecting residues of curable material are provided. The semiconductor apparatus includes a chamber containing a wafer cassette, and a collecting module disposed in the chamber for collecting residues of curable material in the chamber. The collecting module includes a flow-directing structure disposed below a ceiling of the chamber, a baffle structure disposed below the flow-directing structure, and a tray disposed on the wafer cassette. The flow-directing structure includes a first hollow region, the baffle structure includes a second hollow region, and the tray is moved together with the wafer cassette to pass through the second hollow region of the baffle structure and is positioned to cover the first hollow region of the flow-directing structure.

Abstract: A system and method for to modify a setup to allow a restart despite a faulty hardware component is disclosed. The system includes a management controller storing a system error log. The computer system includes hardware components in communication with the management controller. A basic input output system (BIOS) includes a start-up routine that successfully completes if all of the hardware components are functional. The start-up routine determines an error in one of the hardware components from the system error log. The routine disables the hardware component. The routine then completes a power-on self-test routine.

Abstract: A system and method for providing system data during a power-on routine of a basic input output system. A controller is powered with an independent power source and accesses the system data. A power-on self-test routine is performed via a basic input output system. The fastest available interface of a plurality of interfaces between the basic input output system and the controller is determined. One of the plurality of interfaces is selected. The system data is sent from the controller to the basic input output system via the selected interface during the power-on self-test routine.

Abstract: A system and method for providing system data during a power-on routine of a basic input output system. A controller is powered with an independent power source and accesses the system data. A power-on self-test routine is performed via a basic input output system. The fastest available interface of a plurality of interfaces between the basic input output system and the controller is determined. One of the plurality of interfaces is selected. The system data is sent from the controller to the basic input output system via the selected interface during the power-on self-test routine.

Abstract: An enhancement mode GaN transistor is provided, which includes a GaN layer, a quantum well structure, a gate, a source a drain and a first barrier layer. The quantum well structure is disposed on the upper surface of the GaN layer. The gate is disposed on the quantum well structure. The source is disposed on one end of the upper surface of the GaN layer. The drain is disposed on the other end of the upper surface of the GaN layer. The first barrier layer is disposed on the upper surface of the GaN layer and extends to the lateral surfaces of the quantum well structure.

Abstract: An enhancement mode GaN transistor is provided, which includes a GaN layer, a quantum well structure, a gate, a source a drain and a first barrier layer. The quantum well structure is disposed on the upper surface of the GaN layer. The gate is disposed on the quantum well structure. The source is disposed on one end of the upper surface of the GaN layer. The drain is disposed on the other end of the upper surface of the GaN layer. The first barrier layer is disposed on the upper surface of the GaN layer and extends to the lateral surfaces of the quantum well structure.

Abstract: The disclosure is directed to a method and apparatus for D2D communication in a wireless communication system and related apparatuses using the same. In one of the exemplary embodiments, a proposed method may include determining whether to performing a D2D transmission and a cellular transmission simultaneously in a resource block allocated in a cellular uplink time slot; if a cellular uplink transmission rate in addition to a D2D transmission rate is greater than or equal to a maximum cellular UL transmission rate: performing the D2D transmission and the cellular transmission simultaneously; and adjusting a power of the D2D transmission and a power of the cellular transmission to maximize an overall transmission rate which is the cellular UL transmission rate in addition to the D2D transmission rate.

Abstract: The disclosure is directed to a method and apparatus for D2D communication in a wireless communication system and related apparatuses using the same. In one of the exemplary embodiments, a proposed method may include determining whether to performing a D2D transmission and a cellular transmission simultaneously in a resource block allocated in a cellular uplink time slot; if a cellular uplink transmission rate in addition to a D2D transmission rate is greater than or equal to a maximum cellular UL transmission rate: performing the D2D transmission and the cellular transmission simultaneously; and adjusting a power of the D2D transmission and a power of the cellular transmission to maximize an overall transmission rate which is the cellular UL transmission rate in addition to the D2D transmission rate.

Abstract: The present invention provides a method of making a pixel structure of a reflective type electrophoretic display device. First, a first metal pattern layer, an insulating layer, a semiconductor pattern layer and a second metal pattern layer are formed sequentially on a substrate. Next, a passivation layer is formed on the substrate, the semiconductor pattern layer and the second metal pattern layer, and an organic photoresist layer is formed on the passivation layer, wherein the organic photoresist layer has a first contact hole exposing the passivation layer. Then, the organic photoresist layer is utilized as a mask to remove the exposed passivation layer and to form a second contact hole in the passivation layer to expose the second metal pattern layer. Subsequently, a third metal pattern layer and a transparent conductive pattern are formed sequentially on the organic photoresist pattern layer and the exposed second metal pattern layer.

Abstract: The invention provides a metal thermal interface material (TIM) with through-holes in its body and/or zigzags or wave shapes on its border, which is suitable for use at thermal interfaces of a thermal conduction path from an integrated circuit die to its associated heat sink in a packaged microelectronic component. The invention also includes a thermal module and a packaged microelectronic component including the metal thermal interface material.

Abstract: A suction cup device includes a cup forming unit cooperating with a flat surface to create a volume-variable space, a liftable rod secured to a central portion of the cup forming unit, a bracing shell member having a force-transmitting surrounding wall in engagement with a peripheral portion of the cup forming unit, and a twistable cap member having a surrounding bottom wall in abutting against a circumferential abutment region of the bracing shell member and threadedly engaged with the liftable rod such that a manually twisted movement of the twistable cap member can result in axial movement of the rod so as to pull the central portion away from the flat surface to produce a reduced pressure in the volume-variable space and a biasing force to thereby ensuring fluid-tight engagement of the cup forming unit with the flat surface.

Abstract: A suction cup device includes a cup forming unit cooperating with a flat surface to create a volume-variable space, a liftable rod secured to a central portion of the cup forming unit, a bracing shell member having a force-transmitting surrounding wall in engagement with a peripheral portion of the cup forming unit, and a twistable cap member having a surrounding bottom wall in abutting against a circumferential abutment region of the bracing shell member and threadedly engaged with the liftable rod such that a manually twisted movement of the twistable cap member can result in axial movement of the rod so as to pull the central portion away from the flat surface to produce a reduced pressure in the volume-variable space and a biasing force to thereby ensuring fluid-tight engagement of the cup forming unit with the flat surface.

Abstract: The invention provides a metal thermal interface material (TIM) with through-holes in its body and/or zigzags or wave shapes on its border, which is suitable for use at thermal interfaces of a thermal conduction path from an integrated circuit die to its associated heat sink in a packaged microelectronic component. The invention also includes a thermal module and a packaged microelectronic component including the metal thermal interface material.

Abstract: The present invention relates to a method for forming a contact opening. First, a substrate having at least a dielectric layer formed thereon is provided. Then, a photoresist layer having a first opening is formed on the dielectric layer. A plasma etching operation is performed to form a second opening in the dielectric layer, and the first opening is located above the second opening. The bottom part of the first opening has a diameter smaller than that of the top part of the second opening. Thereafter, the photoresist layer is removed from the dielectric layer. Accordingly, at least a portion of the exposed contact opening will not be oxidized to prevent an increase in the resistance between the conductive pattern and the conductive layer that fills in the contact opening.

Abstract: The present invention relates to a method for forming a contact opening. First, a substrate having at least a dielectric layer formed thereon is provided. Then, a photoresist layer having a first opening is formed on the dielectric layer. A plasma etching operation is performed to form a second opening in the dielectric layer, and the first opening is located above the second opening. The bottom part of the first opening has a diameter smaller than that of the top part of the second opening. Thereafter, the photoresist layer is removed from the dielectric layer. Accordingly, at least a portion of the exposed contact opening will not be oxidized to prevent an increase in the resistance between the conductive pattern and the conductive layer that fills in the contact opening.

Abstract: A Coriolis force type flow meter uses an optical interferometer as the measuring device. When a tube that a fluid flows through experiences a bending vibration caused by an external stimulating source, the tube also has a twist vibration due to the action of the Coriolis force. The optical interferometer is then employed to measure the tiny angular change in the amplitude of the tube vibration. From such a measurement, one can determine the flux of the fluid in the tube.