Abstract: Provided is a hydraulic multiport connection design for a microfluidic device. The electrowetting on dielectric (EWOD) system comprises a first connection device including a first housing, a first port, a second port, and a first channel within the first housing, the first channel coupling to the first port and the second port. A second connection device is coupled to the first connection device. The second connection device includes a second housing, a third port, a fourth port and a second channel within the second housing, the second channel coupling to the third port and the fourth port. The first connection device and the second connection device are coupled by securely engaging the second port to the third port. The second port and the third port are configured to be engaged seamlessly.

Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

Abstract: A method for preparing a carbide protective layer comprises: (A) mixing a carbide powder, an organic binder, an organic solvent and a sintering aid to form a slurry; (B) spraying the slurry on a surface of a graphite component to form a composite component; (C) subjecting the composite component to a cold isostatic pressing densification process; (D) subjecting the composite component to a constant temperature heat treatment; (E) repeating steps (B)-(D) until a coating is formed on a surface of the composite component; (F) subjecting the coating to a segmented sintering process; (G) obtaining a carbide protective layer used for the surface of the composite component. Accordingly, while the carbide protective layer can be completed by using the wet cold isostatic pressing densification process and the cyclic multiple superimposition method, so that it can improve the corrosion resistance in the silicon carbide crystal growth process environment.

Abstract: A method for preparing a carbide protective layer comprises: (A) mixing a carbide powder, an organic binder, an organic solvent and a sintering aid to form a slurry; (B) spraying the slurry on a surface of a graphite component to form a composite component; (C) subjecting the composite component to a cold isostatic pressing densification process; (D) subjecting the composite component to a constant temperature heat treatment; (E) repeating steps (B)-(D) until a coating is formed on a surface of the composite component; (F) subjecting the coating to a segmented sintering process; (G) obtaining a carbide protective layer used for the surface of the composite component. Accordingly, while the carbide protective layer can be completed by using the wet cold isostatic pressing densification process and the cyclic multiple superimposition method, so that it can improve the corrosion resistance in the silicon carbide crystal growth process environment.

Abstract: A method of growing on-axis silicon carbide single crystal includes the steps of (A) sieving a silicon carbide source material by size, and only the part that has a size larger than 1 cm is adopted for use as a sieved silicon carbide source material; (B) filling the sieved silicon carbide source material in the bottom of a graphite crucible; (C) positioning an on-axis silicon carbide on a top of the graphite crucible to serve as a seed crystal; (D) placing the graphite crucible having the sieved silicon carbide source material and the seed crystal received therein in an induction furnace for the physical vapor transport process; (E) starting a silicon carbide crystal growth process; and (F) obtaining a silicon carbide single crystal.

Abstract: A stacked, multi-die semiconductor device and method of forming thereof. A preferred embodiment comprises disposing a stack of semiconductor dies to a substrate. The stacking arrangement is such that a lateral periphery of an upper die is cantilevered over a lower die thereby forming a recess. A supporting adhesive layer containing a filler is disposed upon the substrate about the lateral periphery of the lower die and substantially filling the recess. In one preferred embodiment, the filler comprises microspheres. In another preferred embodiment, the filler comprises a dummy die, an active die, or a passive die.

Abstract: A stacked, multi-die semiconductor device and method of forming thereof. A preferred embodiment comprises disposing a stack of semiconductor dies to a substrate. The stacking arrangement is such that a lateral periphery of an upper die is cantilevered over a lower die thereby forming a recess. A supporting adhesive layer containing a filler is disposed upon the substrate about the lateral periphery of the lower die and substantially filling the recess. In one preferred embodiment, the filler comprises microspheres. In another preferred embodiment, the filler comprises a dummy die, an active die, or a passive die.

Abstract: A stacked, multi-die semiconductor device and method of forming thereof. A preferred embodiment comprises disposing a stack of semiconductor dies to a substrate. The stacking arrangement is such that a lateral periphery of an upper die is cantilevered over a lower die thereby forming a recess. A supporting adhesive layer containing a filler is disposed upon the substrate about the lateral periphery of the lower die and substantially filling the recess. In one preferred embodiment, the filler comprises microspheres. In another preferred embodiment, the filler comprises a dummy die, an active die, or a passive die.

Abstract: A probe card having a member for sending and receiving electrical signals for operational testing of a semiconductor integrated circuit, and a plurality of probe pins extending from the member in a manner which causes free ends of the pins to contact wafer test pads substantially across a maximum dimension of the pads. Also, a test pad for a wafer or a substrate having a pad of electrically conductive material disposed in an area between seal rings of the wafer or substrate, the pad having a shape and/or a rotational orientation within the area between the seal rings that minimizes pad material immediately adjacent the seal rings.

Abstract: A stacked, multi-die semiconductor device and method of forming thereof. A preferred embodiment comprises disposing a stack of semiconductor dies to a substrate. The stacking arrangement is such that a lateral periphery of an upper die is cantilevered over a lower die thereby forming a recess. A supporting adhesive layer containing a filler is disposed upon the substrate about the lateral periphery of the lower die and substantially filling the recess. In one preferred embodiment, the filler comprises microspheres. In another preferred embodiment, the filler comprises a dummy die, an active die, or a passive die.

Abstract: A converting module for connecting a memory card to a projector is provided. The converting module is modulized and coupled to the projector so that the projector can directly read and play the image data stored in the memory card on the basis of not altering the system configuration of the projector itself. Furthermore, I2C communication protocol is used as the standard of signal transmission between the memory card and the projector so as to save cost of designing pertinent hardware and software.

Abstract: A process for separating IC dies from a wafer substrate. In one embodiment, complete separation channels are initially cut through the wafer between dies along one axis. Next, partial separation channels are cut into the wafer along an intersecting axis, leaving wafer material connecting adjacent dies. In another embodiment, partial separation channels are cut into the wafer along one axis, after which complete separation channels are cut through the wafer along the intersecting axis. In still another embodiment, partial separation channels are cut along both axes.

Abstract: A process for separating IC dies from a wafer substrate. In one embodiment, complete separation channels are initially cut through the wafer between dies along one axis. Next, partial separation channels are cut into the wafer along an intersecting axis, leaving wafer material connecting adjacent dies. In another embodiment, partial separation channels are cut into the wafer along one axis, after which complete separation channels are cut through the wafer along the intersecting axis. In still another embodiment, partial separation channels are cut along both axes.

Abstract: A key management method to prevent illegal eavesdropping in a network system. Keys of the network system are divided into several family subkeys and several communication subkeys. A plurality of trusted-key centers are provided for respectively preserving a part of the family subkeys and one of the communication subkeys, and generating a one-way hash value involving the preserved communication subkey and an open information. Each of the trusted-key centers passes the hash value to an eavesdropper according to an authority certificate. Each of the trusted-key centers interchanges the preserved family subkeys according to the authority certificate to obtain a session key which is passed to the eavesdropper. The eavesdropper combines all the hash values from the trusted-key centers to obtain a corresponding communication key which is accompanied by the session key to eavesdrop an authorized communication.

Abstract: The invention provides a method of manufacturing a card such as bankcards provided with an anti-counterfeit differentiable mark. A stamper is fabricated by engraving and plate-making methods, the stamper being engraved with a feature pattern provided by a client, such as bank logo and trademarks. The feature pattern of the stamper is transferred onto a surface of a card by injection molding. A metallic layer is formed on the card by plating. A printing layer is finally formed on the card by printing. Hence fabricated, the card is provided with a text and/or graphics pattern similar to the effects of a hologram pattern.

Abstract: A card fabrication method of the invention uses ABS plastics to form a card body of the card. The fabrication method of the invention is used to manufacture various types of cards such as bankcards. The ABS material is injection molded to form the card body. While injection molding the card body, different additives and colorant agents are incorporated to the ABS to obtain a card body that is easily differentiated via a specific color aspect. The specific color aspect is in accordance with a specific card emitter. Printing is simultaneously performed on two faces of the card body to achieve the differentiable card. By attributing specific color aspects to specific card emitters and, counterfeit cards is therefore easily differentiated from authentic cards by the color aspect of the card body.

Abstract: A method of automatic identifying and skipping defective work pieces mainly utilizes a reject eye formed inside the die covering area on a substrate to automatically determine whether the skipping procedure is triggered or not. The method of the present invention comprises the steps of: finding and aligning the die eye of the die as well as the lead eye of the substrate; finding the reject eye when the die eye and the lead eye is evaluated as not being present; stopping the wire bonding operation and skipping to next work piece when the reject eye is located. The method of present invention is capable of automatically determining whether the skipping procedure is triggered or not thereby reducing operating down time and increasing throughput.

Abstract: A method for positioning bond pads in a semiconductor die comprises the steps of (I) setting parameters including (a) setting a baseline pad pitch to a first value, (b) setting a first pad position equal to a first pad value and (c) providing a focal point; (II) determining a first angle between a first line through a center of the first pad position and the focal point and a second line through a center of the semiconductor die and normal to the edge; (III) determining a first pad spacing increment value equal to the first value divided by a cosine of the first angle; (IV) setting a second pad position equal to a second pad value, wherein the second pad value at least equals the first pad value plus the first value if both of the first bond pad and the second bond pad are ground pad or power pad with the same potential, else the second pad value at least equals the first pad value plus the first pad spacing increment value; and (V) using the first and second pad values to respectively position a first bond p

Abstract: A bonding method which prevents wire sweep and the wire structure thereof mainly provide the pre-shifted wire between the first bonding point and the second bonding point and counter to the mold flow from the side thus intensifying the strength of the wire structure and increasing the deformation space of the wire sustaining mold flow.

Abstract: A BGA package includes a chip with an array pad design disposed on the upper surface of a substrate. The chip has a plurality of bonding pads located about the periphery thereof, and the bonding pads of the chip are positioned in three rows, an inner row, a middle row, and an outer row along the sides of the chip. Only power supply pads and ground pads are designed to be located in the outer row of bonding pads, and all of the I/O pads are designed to be located in the middle row of the bonding pads and the inner row of the bonding pads.