Patents by Inventor Tsung Chen

Tsung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978570
    Abstract: An antioxidant conductive thermal paste and a method of manufacturing the same are provided. The antioxidant conductive thermal paste includes a reactive monomer, a thermosetting resin, a polymerization inhibitor, an electrically conductive filler, and a thixotropic agent. The method consists of the steps of mixing a reactive monomer, a thermosetting resin, and a polymerization inhibitor evenly to get a first polymer mixture, and adding an electrically conductive filler and a thixotropic agent into the first polymer mixture in turn and blending the mixture evenly to obtain an antioxidant conductive thermal paste with good adherence, high electrical conductivity, high thermal conductivity, improved thermal-mechanical fatigue resistance or mechanical fatigue resistance.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: May 7, 2024
    Assignee: Geckos Technology Corp.
    Inventors: Wei-Chen Chang, Chen-Yen Fan, Ping-Hung Chen, Tsung-Huan Sheng
  • Patent number: 11979661
    Abstract: A method for performing light shaping with aid of an adaptive projector and associated apparatus are provided.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: May 7, 2024
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Wu-Feng Chen, Ching-Wen Wang, Cheng-Che Tsai, Hsueh-Tsung Lu
  • Publication number: 20240145559
    Abstract: A transistor structure includes a substrate, a source electrode, a drain electrode, a protective layer and a gate electrode. The source electrode and the drain electrode are provided on the substrate. The protective layer is provided on the substrate. The protective layer is provided between the source electrode and the drain electrode. The protective layer includes a SiNx layer and a SiOx layer. The SiOx layer is provided on the substrate, the SiNx layer is provided on the SiOx layer, and a through hole of the protective layer is formed to extend through the SiNx layer and the SiOx layer. The gate electrode is provided in the through hole, and the gate electrode is separated from at least part of the SiOx layer so as to form an air gap therebetween.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 2, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chang-Yan HSIEH, Po-Tsung TU, Jui-Chin CHEN, Hui-Yu CHEN, Po-Chun YEH
  • Publication number: 20240139990
    Abstract: An internal rotor type nail drive device of electric nail gun, comprising a nailing rod and an internal rotor type rotary actuator that can output a specific rotation angle and can drive the nailing rod to move downward for nailing. Specifically, the rotary actuator comprises a stator and a rotor arranged inside the stator, even groups of electromagnetic mutual action components are configured in pairs between the stator and the rotor, to generate a tangential force to drive the rotor to rotate for a specific rotation angle, and to drive the nailing rod to move for a nailing stroke. The nailing stroke can be determined by a specific rotation angle. Thus, through the above configuration of the rotary actuator, the structure of the electric nail gun can be simplified, and the kinetic energy for nailing can be increased.
    Type: Application
    Filed: August 22, 2023
    Publication date: May 2, 2024
    Inventors: I-TSUNG WU, CHIA-SHENG LIANG, YU-CHE LIN, WEN-CHIN CHEN
  • Publication number: 20240145473
    Abstract: A semiconductor device includes a first transistor and a first gate electrically coupled to the first transistor. A second transistor is positioned on top of the first transistor. A second gate is electrically coupled to the second transistor. A dielectric isolation layer is positioned between the first gate and the second gate. A first conductive contact is electrically coupled to the first gate. A second conductive contact is electrically coupled to the second gate. A control of the first gate through the first conductive contact is independent of a control of the second gate through the second conductive contact.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Tsung-Sheng Kang, Su Chen Fan, Jingyun Zhang, Ruqiang Bao, Son Nguyen
  • Patent number: 11974302
    Abstract: A method and a User Equipment (UE) for beam operations are provided. The method includes monitoring at least one of a plurality of Control Resource Sets (CORESETs) configured for the UE within an active Bandwidth Part (BWP) of a serving cell in a time slot; and applying a first Quasi Co-Location (QCL) assumption of a first CORESET of a set of one or more of the monitored at least one of the plurality of CORESETs to receive a Downlink (DL) Reference Signal (RS), wherein the first CORESET is associated with a monitored search space configured with a lowest CORESET Identity (ID) among the set of one or more of the monitored at least one of the plurality of CORESETs.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: April 30, 2024
    Assignee: Hannibal IP LLC
    Inventors: Chien-Chun Cheng, Tsung-Hua Tsai, Yu-Hsin Cheng, Wan-Chen Lin
  • Publication number: 20240135990
    Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Ming-Che Lin, Min-Chih Wei, Ping-Kun Wang, Yu-Ting Chen, Chih-Cheng Fu, Chang-Tsung Pai
  • Patent number: 11967582
    Abstract: A multi-chip device includes a first material within a substrate. The first material has a first coefficient of thermal expansion different than a second coefficient of thermal expansion of the substrate. A first chip overlies a first portion of the first material and a first portion of the substrate. A second chip overlies a second portion of the first material and a second portion of the substrate. The first material is between the first portion of the substrate and the second portion of the substrate.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chin-Hua Wang, Po-Chen Lai, Shu-Shen Yeh, Tsung-Yen Lee, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11965822
    Abstract: A light emitting apparatus has light emitting units. The light emitting units can be respectively provided with current densities, so that the light emitted by each of the light emitting unit has a light intensity, wherein the current densities are different from each other, or partial of the current densities are different from each other. A number of the light emitting units can be larger than or equal to four, all of the four lighting frequencies of the four light emitting units are different from each other, or partial of the four lighting frequencies of the four light emitting units are identical to each other, and the light emitting apparatus and the object under test rotate relative to each other. A light emitting method, a spectrum detection method and a lighting correction method are also illustrated for increasing SNR, correcting the light intensity or the spectrum signal.
    Type: Grant
    Filed: May 18, 2021
    Date of Patent: April 23, 2024
    Assignee: MEGA CRYSTAL BIOTECHNOLOGY SINGAPORE PTE. LTD
    Inventors: Yi-Sheng Ting, Yu-Tsung Chen
  • Patent number: 11961629
    Abstract: An antioxidant conductive thermal paste and a method of manufacturing the same are provided. The antioxidant conductive thermal paste includes a reactive monomer, a thermosetting resin, a polymerization inhibitor, an electrically conductive filler, and a thixotropic agent. The method consists of the steps of mixing a reactive monomer, a thermosetting resin, and a polymerization inhibitor evenly to get a first polymer mixture, and adding an electrically conductive filler and a thixotropic agent into the first polymer mixture in turn and blending the mixture evenly to obtain an antioxidant conductive thermal paste with good adherence, high electrical conductivity, high thermal conductivity, improved thermal-mechanical fatigue resistance or mechanical fatigue resistance.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Geckos Technology Corp.
    Inventors: Wei-Chen Chang, Chen-Yen Fan, Ping-Hung Chen, Tsung-Huan Sheng
  • Publication number: 20240119613
    Abstract: A structured-light three-dimensional (3D) scanning system includes a projector that emits a projected light with a predetermined pattern onto an object; an image capture device that generates a captured image according to a reflected light reflected from the object, the predetermined pattern of the projected light being distorted due to 3D shape of the object, thereby resulting in a distorted pattern; a depth decoder that converts the distorted pattern into a depth map representing the 3D shape of the object; and a depth fusion device that generates a fused depth map according to at least two different depth maps associated with the object.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventors: Hsueh-Tsung Lu, Ching-Wen Wang, Cheng-Che Tsai, Wu-Feng Chen
  • Publication number: 20240121718
    Abstract: Some of the present implementations provide a method for a user equipment (UE) for receiving a power saving signal. The method receives, from a base station, a power saving signal comprising a minimum applicable K0 (K0min) that indicates a minimum scheduling offset restriction between a physical downlink control channel (PDCCH) and a physical downlink shared channel (PDSCH). The method determines an application delay based on a predefined value. The method then applies the minimum scheduling offset restriction after the application delay.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Hsin Cheng, Chie-Ming Chou, Wan-Chen Lin, Tsung-Hua Tsai
  • Publication number: 20240118423
    Abstract: A projector sequentially generates light pulses to form a sparse grid array. The light pulses reflect off objects in an environment and are reflected towards a sensor array. The sensor array sequentially senses the reflected light pulses across pixels of the sensor array. A depth sensing system calculates depth information of objects in the environment based on the sequential nature of the pulse generation and the pulse sensing. The depth sensing system calculates depth information based on both the positional and temporal information of generated light pulses, and the positional and temporal information of sensed light pulses. The depth sensing system may generate a representation of the environment based on the depth information.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 11, 2024
    Inventors: Onur Can Akkaya, Song Chen, Xinqiao Liu, Andrew Samuel Berkovich, Tsung-Hsun Tsai, Yi Zheng, Raffaele Capoccia
  • Patent number: 11956560
    Abstract: In some examples, a sensor apparatus comprises: a pixel cell configured to generate a voltages, the pixel cell including a photodiode configured to generate charge in response to incoming light, and a charge storage device to convert the charge to a voltage; an integrated circuit configured to: determine a first captured voltage converted by the charge storage device during a first time period; compare the first captured voltage to a threshold voltage value; and in response to determining that the first captured voltage meets or exceeds the threshold voltage value: determine first time data corresponding to the first time period; and prevent the charge storage device from further generating a charge; and an analog-to-digital converter (ADC) configured to generate a digital pixel value based on the first captured voltage, and a memory to store the digital pixel value and the first time data.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: April 9, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Tsung-Hsun Tsai, Song Chen, Xinqiao Liu
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Publication number: 20240114263
    Abstract: An image-sensing system includes multiple sensing modules. Each of the multiple sensing modules includes multiple optical sensors arranged in an array. Each of the multiple sensors is configured to be switched on and off to generate analog sensing data. The image-sensing system also includes an analog-to-digital converter (ADC) shared by the multiple optical sensors configured to convert analog sensing data generated by the multiple optical sensors into digital data. The image-sensing system also includes a processor configured to control the multiple sensing modules.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 4, 2024
    Inventors: Andrew Samuel Berkovich, Xinqiao Liu, Onur Can Akkaya, Tsung-Hsun Tsai, Song Chen, Lyle David Bainbridge
  • Patent number: 11948896
    Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
  • Publication number: 20240106246
    Abstract: Disclosed is a power storage device and method for discharging the same, which configures the power storage device to perform an electric power output under a discharging limit upon coupling with a load device and before any authentication is conducted. The discharging limit for the electric power output will be lifted only when an authentication result between the power storage device and the load device indicates a successful authentication.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 28, 2024
    Inventors: Wei-Tsung Huang, I-Sheng Chen, Liang-Yi Hsu
  • Patent number: D1020435
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 2, 2024
    Assignee: BROGENT TECHNOLOGIES INC.
    Inventors: Shih-Kuang Chiu, Chia-Wei Yeh, Juei-Tsung Chen
  • Patent number: D1021698
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: April 9, 2024
    Assignee: Jalco Industry Co., Ltd.
    Inventor: Han-Tsung Chen