Patents by Inventor Tsung-Cheng Chan

Tsung-Cheng Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200038246
    Abstract: An eye protection device including a first transparent substrate, a second transparent substrate, and a high reflection interference film is provided. The second transparent substrate is opposite to the first transparent substrate. The high reflection interference film is disposed on the first transparent substrate or the second transparent substrate.
    Type: Application
    Filed: August 1, 2018
    Publication date: February 6, 2020
    Applicant: Orange Bright Optics Inc.
    Inventors: Ke-Shu Chin, Chi-Hua Lee, Tsung-Wei Chan, Kuang-Hua Chang, Chih-Cheng Yang
  • Patent number: 10475742
    Abstract: A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 12, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
  • Patent number: 10283450
    Abstract: A method, for forming a semiconductor device structure, includes: forming a conductive structure over a substrate, wherein the conductive structure includes twin boundaries. The forming the conductive structure includes: manipulating process conditions so as to promote formation of the twin boundaries and yet control a density of the twin boundaries to be outside a range for which a portion of a curve is an asymptote of a constant value, the curve representing values of an atomic migration ratio corresponding to values of the density of the twin boundaries.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: May 7, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
  • Publication number: 20190103351
    Abstract: A method of forming a semiconductor device structure includes: forming a first conductive structure over a substrate, the first conductive structure including twin boundaries; and wherein the forming the first conductive structure includes manipulating process conditions so as to promote formation of the twin boundaries resulting in a promoted density of twin boundaries such that the first conductive structure has an increased failure current density (FCD) relative to a baseline FCD of an otherwise substantially corresponding second conductive structure which has an unpromoted density of twin boundaries, the unpromoted density being less than the promoted density and such that the first conductive structure has a resistance which is substantially the same as the second conductive structure.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
  • Publication number: 20170338178
    Abstract: A method, for forming a semiconductor device structure, includes: forming a conductive structure over a substrate, wherein the conductive structure includes twin boundaries. The forming the conductive structure includes: manipulating process conditions so as to promote formation of the twin boundaries and yet control a density of the twin boundaries to be outside a range for which a portion of a curve is an asymptote of a constant value, the curve representing values of an atomic migration ratio corresponding to values of the density of the twin boundaries.
    Type: Application
    Filed: August 9, 2017
    Publication date: November 23, 2017
    Inventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
  • Patent number: 9761523
    Abstract: A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 ?m?1 to about 250 ?m?1.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: September 12, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian-Hong Lin, Chwei-Ching Chiu, Yung-Huei Lee, Chien-Neng Liao, Yu-Lun Chueh, Tsung-Cheng Chan, Chun-Lung Huang
  • Publication number: 20170207194
    Abstract: A chip package is provided. The chip package includes a first chip including a carrier substrate and a device substrate thereon. A second chip is mounted on the device substrate. A portion of the device substrate extends outward from the edge of the second chip, so as to be exposed from the second chip. A conductive pad is between the device substrate and the second chip. A polymer protective layer conformally covers the second chip, the exposed portion of the device substrate, and the edge of the carrier substrate. A redistribution layer is disposed on the polymer protective layer and extends into a first opening that passes through the polymer protective layer and the second chip and exposes the conductive pad, so as to be electrically connected to the conductive pad.
    Type: Application
    Filed: January 18, 2017
    Publication date: July 20, 2017
    Inventors: Hsing-Lung SHEN, Jiun-Yen LAI, Yu-Ting HUANG, Tsung-Cheng CHAN, Jan-Lian LIAO, Hung-Chang CHEN, Ming-Chieh HUANG, Hsi-Chien LIN
  • Publication number: 20170053865
    Abstract: A semiconductor device structure with twin-boundaries and method for forming the same are provided. The semiconductor device structure includes a substrate and a conductive structure formed over the substrate. The conductive structure includes twin boundaries, and a density of the twin boundaries is in a range from about 25 ?m?1 to about 250 ?m?1.
    Type: Application
    Filed: August 21, 2015
    Publication date: February 23, 2017
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Jian-Hong LIN, Chwei-Ching CHIU, Yung-Huei LEE, Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Chun-Lung HUANG
  • Patent number: 9023663
    Abstract: The object of the present invention is to provide a method for preparing a nano-sheet array structure of a Group V-VI semiconductor, comprising: (A) providing an electrolyte containing a hydrogen ion and disposing an auxiliary electrode and a working electrode in the electrolyte, wherein the working electrode comprises a Group V-VI semiconductor bulk; and (B) applying a redox reaction bias to the auxiliary electrode and the working electrode to form a nano-sheet array structure on the bulk.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 5, 2015
    Assignee: National Tsing Hua University
    Inventors: Yu-Lun Chueh, Hung-Wei Tsai, Tsung-Cheng Chan
  • Publication number: 20140329338
    Abstract: The object of the present invention is to provide a method for preparing a nano-sheet array structure of a Group V-VI semiconductor, comprising: (A) providing an electrolyte containing a hydrogen ion and disposing an auxiliary electrode and a working electrode in the electrolyte, wherein the working electrode comprises a Group V-VI semiconductor bulk; and (B) applying a redox reaction bias to the auxiliary electrode and the working electrode to form a nano-sheet array structure on the bulk.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 6, 2014
    Applicant: National Tsing Hua University
    Inventors: Yu-Lun CHUEH, Hung-Wei TSAI, Tsung-Cheng CHAN
  • Publication number: 20130270121
    Abstract: The present invention discloses a method for fabricating a copper nanowire with high density twins, which comprises steps: providing a template having a top surface, a bottom surface and a plurality of through-holes penetrating the top surface and the bottom surface and having a diameter of smaller than 55 nm; placing the template in a copper-containing electrolyte at a low temperature lower than ambient temperature and applying a pulse current to perform an electrodeposition process to form a copper nanowire with twin structures in each through-hole. The pulse current increases the probability of stacking faults in the deposited copper ions. The low temperature operation favors formation of nucleation sites of twins. Therefore, the copper nanowire has higher density of twins. Thereby is effectively inhibited electromigration of the copper nanowire.
    Type: Application
    Filed: February 27, 2013
    Publication date: October 17, 2013
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chien-Neng LIAO, Yu-Lun CHUEH, Tsung-Cheng CHAN, Yen-Miao LIN
  • Patent number: 8420185
    Abstract: A method for forming a metal film with twins is disclosed. The method includes: (a) forming a metal film over a substrate, the metal film being made of a material having one of a face-centered cubic crystal structure and a hexagonal close-packed crystal structure; and (b) ion bombarding the metal film at a film temperature lower than ?20° C. in a vacuum chamber and with an ion-bombarding energy sufficient to cause plastic deformation of the metal film to generate deformation twins in the metal film.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 16, 2013
    Assignee: National Tsing Hua University
    Inventors: Yu-Lun Chueh, Tsung-Cheng Chan, Chien-Neng Liao
  • Publication number: 20130089674
    Abstract: A method for forming a metal film with twins is disclosed. The method includes: (a) forming a metal film over a substrate, the metal film being made of a material having one of a face-centered cubic crystal structure and a hexagonal close-packed crystal structure; and (b) ion bombarding the metal film at a film temperature lower than ?20° C. in a vacuum chamber and with an ion-bombarding energy sufficient to cause plastic deformation of the metal film to generate deformation twins in the metal film.
    Type: Application
    Filed: July 17, 2012
    Publication date: April 11, 2013
    Inventors: Yu-Lun CHUEH, Tsung-Cheng CHAN, Chien-Neng LIAO