Abstract: An imaging lens assembly of an optical verification system with a FOV greater than 120 degrees, and includes optical lenses from an object side to an image side. The one of the optical lens being the closest to the object side includes: an object side surface and an image side surface of an optical zone; an object side surface of a non-optical-zone surrounding the object side surface of the optical zone; an image side surface of a non-optical zone surrounding the image side surface of the optical zone; and a first connection portion disposed between the image side surface of the optical-zone and the image side surface of the non-optical zone, wherein a first angle between a tangential direction of a surface of the first connection portion and the radial direction is in a range of 15 to 50 degrees.

Abstract: An electronic device includes a metal back cover and an antenna module. The metal back cover includes a slot. The antenna module is located in the metal back cover. The antenna module includes a first radiator, second radiator, third radiator, fourth radiator, and fifth radiator. The first radiator has a feeding end. The second radiator connected to the first radiator has a contact portion which is connected to the metal back cover. The third radiator is connected to the second radiator and is located beside the first radiator. The third radiator has a first grounding terminal. The fourth radiator is connected to the second radiator and has a second grounding terminal. The fifth radiator is connected to the third radiator and the fourth radiator. Distances between the feeding end and the slot, the first grounding terminal and the slot, and the second grounding terminal and the slot all range from 3.5 mm to 10 mm.

Abstract: An imaging lens assembly of an optical verification system with a FOV greater than 120 degrees, and includes optical lenses from an object side to an image side. The one of the optical lens being the closest to the object side includes: an object side surface and an image side surface of an optical zone; an object side surface of a non-optical-zone surrounding the object side surface of the optical zone; an image side surface of a non-optical zone surrounding the image side surface of the optical zone; and a first connection portion disposed between the image side surface of the optical-zone and the image side surface of the non-optical zone, wherein a first angle between a tangential direction of a surface of the first connection portion and the radial direction is in a range of 15 to 50 degrees.

Abstract: A lens assembly is provided, including: a barrel, at least one plastic lens and at least one coating film. The at least one plastic lens is assembled in the barrel. The at least one coating film is disposed on a surface of the at least one plastic lens and includes a plurality of coating layers which include at least one high refractive coating layer and at least one low refractive coating layer. A refractive index of the at least one high refractive coating layer is larger than a refractive index of the at least one low refractive coating layer. A thickness of each of the at least one coating film is larger than or equal to 3 micrometers.

Abstract: A lens with shielding structure includes a main body. The main body defines an axial direction. The main body includes an optical portion and a shielding portion. The optical portion is located at a center of the main body. The shielding portion is annular to surround the optical portion. The shielding portion includes a micro structure and a shielding layer. The micro structure includes a plurality of recesses formed on the main body. The shielding layer is coated on the micro structure to fill the recesses up.

Abstract: An electronic device with fingerprint identification mechanism includes a touch panel, a camera unit, and a processing unit. A part of the touch panel is defined as a recognition area. The touch panel is adapted for at least one finger to touch for controlling. The camera unit is arranged under the touch panel. The camera unit includes a plurality of camera devices spacedly arranged. The camera devices face the touch panel. Projections of imaging ranges of the camera devices on the touch panel partially overlap so that the recognition area is covered by the projections of the imaging ranges of the camera devices. The processing unit is electrically connected to the touch panel and the camera unit respectively.

Abstract: A lens having microstructures has a first face and a second face. The first face has an optical portion at a central portion thereof. An optical mechanism portion is defined around the optical portion. The optical mechanism portion is formed with at least one recessed microstructure whose bottom has a matte surface.

Abstract: An antenna system in a wireless communication device includes a first antenna, a second antenna, a baseband microchip, a signal sensing unit, a logical circuit, and a switch unit. The first antenna receives and transmits wireless signals; the second antenna transmits wireless signals. The baseband microchip processes the wireless signals and provides a voltage logic signal. The logical circuit logically processes the voltage logic signal and the command signal to generate different switch signals, and the switch unit is controlled by the switch signals from the logical circuit to connect to the first antenna or to the second antenna to transmit the wireless signals.

Abstract: An antenna system in a wireless communication device includes a first antenna, a second antenna, a baseband microchip, a signal sensing unit, a logical circuit, and a switch unit. The first antenna receives and transmits wireless signals; the second antenna transmits wireless signals. The baseband microchip processes the wireless signals and provides a voltage logic signal. The logical circuit logically processes the voltage logic signal and the command signal to generate different switch signals, and the switch unit is controlled by the switch signals from the logical circuit to connect to the first antenna or to the second antenna to transmit the wireless signals.

Abstract: A method of fabricating short-gate-length electrodes for integrated III-V compound semiconductor devices, particularly for integrated HBT/HEMT devices on a common substrate is disclosed. The method is based on dual-resist processes, wherein a first thin photo-resist layer is utilized for defining the gate dimension, while a second thicker photo-resist layer is used to obtain a better coverage on the surface for facilitating gate metal lift-off. The dual-resist method not only reduces the final gate length, but also mitigates the gate recess undercuts, as compared with those fabricated by the conventional single-resist processes. Furthermore, the dual-resist method of the present invention is also beneficial for the fabrication of multi-gate device with good gate-length uniformity.

Abstract: A method of fabricating short-gate-length electrodes for integrated III-V compound semiconductor devices, particularly for integrated HBT/HEMT devices on a common substrate is disclosed. The method is based on dual-resist processes, wherein a first thin photo-resist layer is utilized for defining the gate dimension, while a second thicker photo-resist layer is used to obtain a better coverage on the surface for facilitating gate metal lift-off. The dual-resist method not only reduces the final gate length, but also mitigates the gate recess undercuts, as compared with those fabricated by the conventional single-resist processes. Furthermore, the dual-resist method of the present invention is also beneficial for the fabrication of multi-gate device with good gate-length uniformity.

Abstract: An epitaxial layers structure and a method for fabricating HBTs and HEMTs on a common substrate are disclosed. The epitaxial layers comprise generally a set of HBT layers on the top of a set of HEMT layers. The method can be used to fabricate HBT, E-mode HEMT and D-mode HEMT as well as passive devices, that enabling monolithic integration of a significant number of devices on a common substrate by a cost-effective way.

Abstract: A rugged heterojunction bipolar transistor (HBT) power device and the optimal design method thereof are disclosed. By combining the epitaxial layer structure design (embedded emitter ballasting resistor and high breakdown voltage) and power cell design (clamping diodes and base ballasting resistor optimization), HBT power devices with excellent power performance and high ruggedness can be obtained.

Abstract: A heterojunction bipolar transistor (HBT) power transistor with improved ruggedness is disclosed. The optimized design of HBT power transistor combines the use of ballasting resistors, coupling capacitors, as well as novel layout of the transistor cell, which avoids the problem of thermal runaway while maintaining the performance of the HBT power transistor.