Patents by Inventor Tsung-Chieh Chen

Tsung-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10440564
    Abstract: A mobile communication device for avoiding location exposure in a User Equipment (UE) information procedure includes a wireless transceiver configured to perform wireless transmission and reception to and from a service network. The device further includes a controller, configured to determine whether a Radio Resource Control (RRC) security has been activated between the mobile communication device and the service network, and in response to the RRC security not having been activated, does not send a measurement report to the service network via the wireless transceiver after receiving measurement configuration message, wherein the controller is further configured to send the measurement report after the RRC security has been activated.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: October 8, 2019
    Assignee: MEDIATEK INC.
    Inventors: Shih-Chieh Liao, Chun-Pin Chen, Tsung-Liang Lu
  • Patent number: 10394404
    Abstract: A touch display panel includes a substrate, a first sensing electrode layer. The first sensing electrode layer is disposed on the substrate. The first sensing electrode includes a plurality of first metal conductive lines and a plurality of second metal conductive lines connected with the plurality of first metal conductive lines. The first and second metal conductive lines are respectively arranged along different directions. The outermost one of the plurality of first metal conductive line has a first protruding portion.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: August 27, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Yu Wang, Pei-Chieh Chen, Chao-Hsiang Wang
  • Publication number: 20190252294
    Abstract: Cooling devices, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, a cooling device for a semiconductor device includes a reservoir having a first plate and a second plate coupled to the first plate. A cavity is between the first plate and the second plate. A phase change material (PCM) is in the cavity. The cooling device is adapted to dissipate heat from a packaged semiconductor device.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Applicants: Taiwan Semiconductor Manufacturing Company, Ltd., Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chieh Hsieh, Chi-Hsi Wu, Shin-Puu Jeng, Tsung-Yu Chen, Wensen Hung
  • Publication number: 20190227377
    Abstract: A display device includes a first substrate, a second substrate, a plurality of pixels, a polarizing member, and a sealing member. The plurality of pixels are disposed between the first substrate and the second substrate. The polarizing member is disposed between the plurality of pixels and the second substrate, wherein a first area is defined by the polarizing member. The sealing member is disposed between the first substrate and the second substrate, wherein a second area is defined by the sealing member. The first area is located within the second area.
    Type: Application
    Filed: January 22, 2018
    Publication date: July 25, 2019
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Ping-Chieh Hsu
  • Publication number: 20190206982
    Abstract: A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Chia-Lung Chang, Jui-Min Lee, Po-Chun Chen, Li-Wei Feng, Ying-Chiao Wang, Wen-Chieh Lu, Chien-Ting Ho, Tsung-Ying Tsai, Kai-Ping Chen
  • Patent number: 10331789
    Abstract: A semantic analysis apparatus, method, and non-transitory computer readable storage medium thereof are provided. The semantic analysis apparatus performs phrase analysis on a Chinese character string to obtain several groups and semantically analyzes the groups to obtain at least one first probability distribution, wherein each first probability distribution has several first probability values corresponding to several tags one-to-one. The semantic analysis apparatus divides the Chinese character string into several Chinese characters and semantically analyzes the Chinese characters to obtain at least one second probability distribution, wherein each second probability distribution has several second probability values corresponding to the tags one-to-one.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: June 25, 2019
    Assignee: Institute For Information Industry
    Inventors: Yun-Kai Hsu, Tsung-Chieh Chen, Chih-Li Huo, Keng-Wei Hsu
  • Publication number: 20190160298
    Abstract: A wireless electromagnetic thermotherapy apparatus applies a magnetic field on a needle for actuating heat generation thereby, and includes an excitation device and a detector device. The detector device includes a sensor unit that measures a temperature of the needle, a wireless charging unit that generates electrical energy in response to receipt of the magnetic field, a wireless transmitter that is powered by the electrical energy, and that transmits the measured temperature to the excitation device to enable the same to make a comparison between the measured temperature and a target temperature and to adjust an intensity of the magnetic field based on a result of the comparison.
    Type: Application
    Filed: December 28, 2017
    Publication date: May 30, 2019
    Inventors: Tung-Chieh YANG, Yu-Jie LAN, Chien-Chang CHEN, Szu-Hua YANG, Yii-Der WU, Tsung-Chih YU
  • Publication number: 20190139990
    Abstract: A display device that includes a substrate having a display region and an adjacent peripheral region is provided, including; a plurality of sub-pixels provided within the display region; a plurality of data lines electrically connected to the sub-pixels; and a first electronic circuit group and a second electronic circuit group provided in the peripheral region, connected to the corresponding data lines. The first electronic circuit group includes a plurality of first electronic circuits, and the second electronic circuit group includes a plurality of second electronic circuits. Two adjacent first electronic circuits are arranged with a first interval therebetween, and the first interval has a first width. Two adjacent second electronic circuits are arranged with a second interval therebetween, and the second interval has a second width. The first width and the second width are different.
    Type: Application
    Filed: January 2, 2019
    Publication date: May 9, 2019
    Inventors: Pei-Chieh CHEN, Hung-Kun CHEN, Tsung-Yu WANG, Ying-Tong LIN
  • Publication number: 20180365223
    Abstract: A semantic analysis apparatus, method, and non-transitory computer readable storage medium thereof are provided. The semantic analysis apparatus performs phrase analysis on a Chinese character string to obtain several groups and semantically analyzes the groups to obtain at least one first probability distribution, wherein each first probability distribution has several first probability values corresponding to several tags one-to-one. The semantic analysis apparatus divides the Chinese character string into several Chinese characters and semantically analyzes the Chinese characters to obtain at least one second probability distribution, wherein each second probability distribution has several second probability values corresponding to the tags one-to-one.
    Type: Application
    Filed: July 17, 2017
    Publication date: December 20, 2018
    Inventors: Yun-Kai HSU, Tsung-Chieh CHEN, Chih-Li HUO, Keng-Wei HSU
  • Publication number: 20090268471
    Abstract: A lens device used for an LED package includes a base portion, and a refracting portion formed on the top face of the base portion. A recess corresponding to the refracting portion is formed on the bottom face of the base portion. At least one notch connecting with the recess is also formed on the bottom face of the base portion. A surface of refracting portion is provided as a non-spherical convex surface. An indent is formed on the center of the non-spherical convex surface. The light emitted from the LED package is directed toward lateral side, and the angular intensity distribution has an asymmetrical batwing shape, so as to obtain an illuminating apparatus with uniformly illumination.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 29, 2009
    Inventors: Chin-Chung CHEN, Lung-Sheng LIN, Ching-Tsung NI, Tsung-Chieh CHEN
  • Publication number: 20030134451
    Abstract: A packaging structure for back-to-back chips, which includes: a substrate, a first chip, a second chip, and an encapsulation. Wherein, the first chip has an active side and an inactive side, and the active side of the first chip is connected to the substrate by an adhesion layer and conducted electrically with the substrate by wire-bonding. The second chip has an active side that is also conducted electrically with the substrate by wire-bonding and an inactive side that is connected to the inactive side of the first chip by another adhesion layer. The encapsulation covers both the first chip and the second chip for protecting the back-to-back packaging structure.
    Type: Application
    Filed: January 14, 2002
    Publication date: July 17, 2003
    Applicant: PICTA TECHNOLOGY, INC.
    Inventor: Tsung-Chieh Chen
  • Patent number: 6492196
    Abstract: The provision of a semiconductor wafer, which has been formed with a plurality of chips that each can be existent independently; the pre-cure process, in which the buffer layer has not been completely baked or hardened yet, but just for making the buffer layer be in stable condition; the pre-cut process, in which a cut is made at the position of the buffer layer corresponding to the boundary of each IC to make a gap exited between each two adjacent ICs without containing any buffer layer; the post-cut process, in which the buffer layer has completely baked and hardened; the singulation process, in which the both wafer and buffer layer are cut simultaneously to make the plural ICs separated from each other to become IC device that can act independently.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: December 10, 2002
    Assignee: PICTA Technology Inc.
    Inventor: Tsung-Chieh Chen
  • Patent number: 6448110
    Abstract: A method for forming a back-to-back dual-chip package and package formed are disclosed. In the method, a first IC chip is bonded in its inactive surface to an inactive surface of a second IC chip, while solder balls planted on the active surfaces of both chips. One of the chips is connected to lead fingers of a lead frame by the solder balls. The dual-chip assembly together with the lead fingers are then encapsulated in an insulating material for protecting the chips while exposing substantially the solder balls on the IC chip that was not connected to the lead fingers. The encapsulated assembly can then be connected to an outside circuit, such as a printed circuit board, by forming the exposed finger leads for soldering and by fusing the solder balls to the outside circuit. The present invention novel method and device formed advantageously utilize existing chip design for achieving a high density device at a low cost.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: September 10, 2002
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Chieh Chen, Chun-Liang Chen
  • Publication number: 20020031865
    Abstract: A method for forming a back-to-back dual-chip package and package formed are disclosed. In the method, a first IC chip is bonded in its inactive surface to an inactive surface of a second IC chip, while solder balls planted on the active surfaces of both chips. One of the chips is connected to lead fingers of a lead frame by the solder balls. The dual-chip assembly together with the lead fingers are then encapsulated in an insulating material for protecting the chips while exposing substantially the solder balls on the IC chip that was not connected to the lead fingers. The encapsulated assembly can then be connected to an outside circuit, such as a printed circuit board, by forming the exposed finger leads for soldering and by fusing the solder balls to the outside circuit. The present invention novel method and device formed advantageously utilize existing chip design for achieving a high density device at a low cost.
    Type: Application
    Filed: August 25, 1999
    Publication date: March 14, 2002
    Inventors: TSUNG-CHIEH CHEN, CHUN-LIANG CHEN
  • Patent number: 6245598
    Abstract: A method for forming chip scale packages and devices formed by utilizing a wire bonding technique and an interposer board which has recessed peripheral regions are disclosed. In the method, an IC die is bonded on its active surface to an interposer which is constructed with a recessed peripheral regions equipped with interconnections such that shorter bond wires may be run between the IC die and the interposer. The interposer is further equipped, in a top planar surface, with a plurality of interconnections for the subsequently forming of solder balls for connecting to an outside circuit such as a printed circuit board. The present invention novel method further provides the benefit that the shorter wire bonds formed alleviate the wire sweep problem normally occurs in the plastic encapsulation process for such a package.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: June 12, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Tsung-Chieh Chen, Chun-Liang Chen, Kuang-Ho Liao
  • Patent number: 6215180
    Abstract: A dual-sided heat dissipating structure for BGA package includes a step-shaped first heat dissipating member adhering to an active side of the chip and a dish-shaped perforated second heat dissipating member adhering to a non-active side of the chip so that heat generated in the chip may be dissipated more effectively. The step surface first heat dissipating member may also serve as a press mold to enable bonding of inner leads of the substrate to the bonding pads of the chip be done along with adhering of the first heat dissipating member to the chip at same process in the mean time without additional process or equipment. The perforated second heat dissipating member enables moisture escaping from the package to avoid pop corn effect resulting from IR Reflow test. The package may be made at a thin thickness and low cost.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: April 10, 2001
    Assignee: First International Computer Inc.
    Inventors: Tsung-Chieh Chen, Ken-Hsiung Hsu, Yi-Liang Peng, Cheng-Chieh Hsu
  • Patent number: 6160311
    Abstract: An enhanced heat dissipating Chip Scale Package (CSP) method and devices include preparing a heat dissipating base with a recess surrounded by a guarding wall. A chip with an integrated circuit (IC) layout is adhered the heat dissipating base in the recess. A substrate with a metallic circuit layer that is smaller size than the chip is then adhered to the chip. Then coupling the metallic circuit layer with the IC layout. A non-conductive resin is then filled in the recess within the guarding wall and covers the coupling portion. The resulting package device produced by means of BGA package process is small size and has enhanced heat dissipating property. The Package size/chip size ratio may be lower than 1.2 to meet the CSP requirements.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: December 12, 2000
    Assignee: First International Computer Inc.
    Inventors: Tsung-Chieh Chen, Yi-Liang Peng
  • Patent number: 6130477
    Abstract: A thin enhanced TAB BGA package includes an IC chip, a substrate having a center opening and one side laid with a metallic circuitry which has a plurality of inner leads extending to the center opening, a plurality of metallic solder balls attached to the substrate at one side and coupling with the metallic circuitry, and a heat dissipating member adhering partly to the a side of the chip and partly to the substrate for heat dissipating, positioning and supporting the IC chip and the substrate. The IC chip has a another side exposed to ambience to add heat dissipating effect. The heat dissipating member has about same thickness as the substrate. Hence the ball grid array package may be made of a small size and thin thickness. The adhering of heat dissipating member to the chip and substrate may be done at the same process of bonding the inner leads to the IC chip. Thus the thin enhanced TAB BGA package of this invention may be produced at low cost without additional equipment or process.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: October 10, 2000
    Inventors: Tsung-Chieh Chen, Ken-Hsiung Hsu, Yi-Liang Peng, Cheng-Chieh Hsu
  • Patent number: 6077724
    Abstract: A multi-chips semiconductor package and fabrication method mainly combines LOC and BGA techniques to overlap one chip upon another chip in an IC component package. One chip uses leads of a lead frame as connection interface of the circuit in the chip to outside. Another chip uses solder balls as connection interface of the circuit in another chip to outside. The two chips are supported by the lead frame without a substrate used in a conventional BGA package. The two chips may have same or different function. The structure is simple and easy to produce at low cost. The size and length of the IC component is smaller than the one produced by conventional multi-chips packaging techniques.
    Type: Grant
    Filed: September 5, 1998
    Date of Patent: June 20, 2000
    Assignee: First International Computer Inc.
    Inventor: Tsung-Chieh Chen
  • Patent number: 6075281
    Abstract: A lead frame equipped with modified lead fingers which have inclined tip portions for achieving an improved wire bond is provided. The inclined tip portions on the lead fingers can be formed in a stamping process with an angle on a top surface of the inclined tip portion measured at smaller than 30.degree. from a horizontal plane of the lead finger. It is preferred that the inclined angle should be between about 5.degree. and about 30.degree., and more preferred that the angle should be between about 5.degree. and about 20.degree.. A wedge bond formed on the inclined tip portion of a lead finger has improved thickness and thermal stress endurance. The thermal stress endurance may be improved by at least 20% and preferably by at least 50% when tested in a thermal cycling test between 150.degree. C. and -65.degree. C.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: June 13, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Kuang-Ho Liao, Tsung-Chieh Chen, Chuen-Jye Lin