Abstract: The invention discloses a control method in use of a synchronous rectifier controller, controlling a synchronous rectifier in a power supply supplying power a load. The synchronous rectifier is turned ON in response to a terminal signal of the synchronous rectifier. An ON-time of the synchronous rectifier is made not less than a minimum ON-time. A detection result in association with the load is provided, for determining the minimum ON-time. The minimum ON-time is a first period when the detection result indicates the load as a first load, and a second period, shorter than the first period, when the detection result indicates the load as a second load heavier than the first load.

Abstract: A secondary controller applied to a secondary side of a power converter includes a control signal generation circuit and a gate control signal generation circuit. The gate control signal generation circuit generates a gate control signal, and generates an injection signal according to the gate control signal. When a superposition voltage is less than a reference voltage, the control signal generation circuit generates a gate pulse control signal, wherein the gate pulse control signal corresponds to an output voltage of the power converter and the injection signal, the gate control signal generation circuit is further used for generating a gate pulse signal according to the gate pulse control signal, and the gate pulse signal is used for making a primary side of the power converter turned on.

Abstract: An operation power source for an operation power source supplying power to a synchronous rectifier controller is charged according to the invention. The synchronous rectifier controller controls a synchronous rectifier in response to a channel signal of the synchronous rectifier, generating SR ON times and SR OFF times. It is determined whether the channel signal resonates in a first SR OFF time, to provide an oscillation record accordingly. In a second SR OFF time after the first SR OFF time, in response to the oscillation record, a portion of resonance energy that causes the channel signal resonating is directed to charge the operation power source.

Abstract: A power supply has a transformer, a rectifier switch, a secondary-side controller and two diodes. The transformer includes a primary winding, a secondary winding, and a detection winding, inductively coupling to one another. The rectifier switch is connected in series with the secondary winding between two output power lines. The secondary-side controller is electrically coupled to two ends of the detection winding, for controlling the rectifier switch in response to two terminal signals at the two ends respectively. The two diodes are back-to-back electrically connected in series between the two ends, and a joint connecting the two diodes is electrically connected to one of the two output power lines.

Abstract: The invention discloses a control method in use of a synchronous rectifier controller, controlling a synchronous rectifier in a power supply supplying power a load. The synchronous rectifier is turned ON in response to a terminal signal of the synchronous rectifier. An ON-time of the synchronous rectifier is made not less than a minimum ON-time. A detection result in association with the load is provided, for determining the minimum ON-time. The minimum ON-time is a first period when the detection result indicates the load as a first load, and a second period, shorter than the first period, when the detection result indicates the load as a second load heavier than the first load.

Abstract: A secondary controller applied to a secondary side of a power converter includes a control signal generation circuit. The control signal generation circuit is coupled to an output terminal of the secondary side of the power converter for detecting an output voltage of the secondary side and enabling a pulse signal to a signal source of the secondary side of the power converter, wherein the signal source enables a turning-on signal according to the pulse signal. The turning-on signal is coupled to a primary-side auxiliary winding of the power converter through a secondary-side auxiliary winding of the power converter to make the primary-side auxiliary winding generate a voltage, and a primary controller of a primary side of the power converter makes the primary side of the power converter be turned on according to the voltage.

Abstract: A secondary controller applied to a secondary side of a power converter includes a control signal generation circuit. The control signal generation circuit is coupled to an output terminal of the secondary side of the power converter for detecting an output voltage of the secondary side and enabling a pulse signal to a signal source of the secondary side of the power converter, wherein the signal source enables a turning-on signal according to the pulse signal. The turning-on signal is coupled to a primary-side auxiliary winding of the power converter through a secondary-side auxiliary winding of the power converter to make the primary-side auxiliary winding generate a voltage, and a primary controller of a primary side of the power converter makes the primary side of the power converter be turned on according to the voltage.

Abstract: A power supply has a transformer, a rectifier switch, a secondary-side controller and two diodes. The transformer includes a primary winding, a secondary winding, and a detection winding, inductively coupling to one another. The rectifier switch is connected in series with the secondary winding between two output power lines. The secondary-side controller is electrically coupled to two ends of the detection winding, for controlling the rectifier switch in response to two terminal signals at the two ends respectively. The two diodes are back-to-back electrically connected in series between the two ends, and a joint connecting the two diodes is electrically connected to one of the two output power lines.

Abstract: A method of generating a gain of an image frame according to a look up table of gain which is set up based on luminance sensitivity of human eyes is proposed. The method includes setting a gain of an image frame to 1, scanning images of a plurality of front rows of the image frame, averaging the images of the plurality of the front rows of the image frame to generate an average value of the images of the plurality of the front rows of the image frame, finding a gain from the look up table of gain according to the average value of the images of the plurality of the front rows of the image frame, and adjusting remaining rows of the image frame according to the gain to generate images of the remaining rows of the image frame.

Abstract: A voltage generating apparatus is disclosed. The voltage generating apparatus includes a first N-type transistor and an enhancement MOSFET transistor. The first N-type transistor has a first drain/source coupled to a first voltage, a second drain/source generating a first output voltage, and a gate coupled to a second voltage. The enhancement MOSFET transistor has a first drain/source coupled to the second drain/source of the first N-type transistor, and a second drain/source and a gate coupled to a second voltage. The first N-type transistor is a depletion metal oxide semiconductor field effect transistor (MOSFET).

Abstract: A voltage generating apparatus is disclosed. The voltage generating apparatus includes a first N-type transistor and an enhancement MOSFET transistor. The first N-type transistor has a first drain/source coupled to a first voltage, a second drain/source generating a first output voltage, and a gate coupled to a second voltage. The enhancement MOSFET transistor has a first drain/source coupled to the second drain/source of the first N-type transistor, and a second drain/source and a gate coupled to a second voltage. The first N-type transistor is a depletion metal oxide semiconductor field effect transistor (MOSFET).

Abstract: A method of generating a gain of an image frame according to a look up table of gain which is set up based on luminance sensitivity of human eyes is proposed. The method includes setting a gain of an image frame to 1, scanning images of a plurality of front rows of the image frame, averaging the images of the plurality of the front rows of the image frame to generate an average value of the images of the plurality of the front rows of the image frame, finding a gain from the look up table of gain according to the average value of the images of the plurality of the front rows of the image frame, and adjusting remaining rows of the image frame according to the gain to generate images of the remaining rows of the image frame.

Abstract: In a phase locked loop (PLL), phase shifters shift a phase of an input signal. Based on the phases of the input signal, the shifted signals, and a frequency division output signal, phase frequency detectors (PFDs) generate phase difference signals. In response to the phase difference signals, charge pumps (CPs) control output voltages thereof. Based on the output voltages of the CPs, a voltage controlled oscillator (VCO) outputs an output signal. A frequency divider divides the frequency of the output signal from the VCO to generate the frequency division output signal. A circulator outputs the frequency division output signal to one of the PFDs at a proper timing. A modulator reduces quantization errors of the frequency divider.

Abstract: A layout of a power device is provided. The layout includes a substrate, a unit array, a plurality of first, second, third and fourth signal paths, and a first, second, third and fourth port. The unit array with a plurality of rows is disposed on the substrate. Each row of the unit array includes a plurality of units. The first and second signal paths on the substrate are disposed on a first side and a second side of corresponding odd-numbered rows of the unit array. The third and the fourth signal paths on the substrate are disposed above a corresponding row of the unit array. The first to fourth ports on the substrate are electrically connected to the first to fourth signal paths respectively.

Abstract: In a phase locked loop (PLL), phase shifters shift a phase of an input signal. Based on the phases of the input signal, the shifted signals, and a frequency division output signal, phase frequency detectors (PFDs) generate phase difference signals. In response to the phase difference signals, charge pumps (CPs) control output voltages thereof. Based on the output voltages of the CPs, a voltage controlled oscillator (VCO) outputs an output signal. A frequency divider divides the frequency of the output signal from the VCO to generate the frequency division output signal. A circulator outputs the frequency division output signal to one of the PFDs at a proper timing. A modulator reduces quantization errors of the frequency divider.

Abstract: A layout of a power device is provided. The layout includes a substrate, a unit array, a plurality of first, second, third and fourth signal paths, and a first, second, third and fourth port. The unit array with a plurality of rows is disposed on the substrate. Each row of the unit array includes a plurality of units. The first and second signal paths on the substrate are disposed on a first side and a second side of corresponding odd-numbered rows of the unit array. The third and the fourth signal paths on the substrate are disposed above a corresponding row of the unit array. The first to fourth ports on the substrate are electrically connected to the first to fourth signal paths respectively.