Patents by Inventor Tsung-Ching Lu

Tsung-Ching Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990351
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
  • Patent number: 11929288
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jhe-Ching Lu, Bao-Ru Young, Yen-Sen Wang, Tsung-Chieh Tsai
  • Publication number: 20120180014
    Abstract: A computer-implemented method to perform context-sensitive incremental design rule checking (DRC) for an integrated circuit (IC). An incremental DRC engine checks design rule violations between a set of environment shapes and a set of active shapes. If no design rule violations are found, the set of active shapes will be added into the set of environment shapes. Furthermore, the incremental DRC engine can be embedded into placement tools, routing tools, or interactive layout editing tools to check design rule violations and help generate DRC error free layouts.
    Type: Application
    Filed: October 20, 2011
    Publication date: July 12, 2012
    Applicants: SPRINGSOFT, INC., SPRINGSOFT USA, INC.
    Inventors: Min-Yi Fang, Ssu-Ping Ko, Cheng-Ming Wu, Chun-Chen Chen, Tsung-Ching Lu, Tung-Chieh Chen, Yu-Chi Su