Patents by Inventor Tsung-Chuan LEE
Tsung-Chuan LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230367195Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: ApplicationFiled: July 24, 2023Publication date: November 16, 2023Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Shih-Chi FU, Chi-Hua FU, Kuotang CHENG, Bo-Tsun LIU, Tsung Chuan LEE
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Publication number: 20230324804Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: ApplicationFiled: June 14, 2023Publication date: October 12, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung SHIH, Yu-Hsun WU, Bo-Tsun LIU, Tsung-Chuan LEE
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Patent number: 11774844Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: GrantFiled: March 14, 2022Date of Patent: October 3, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Shih-Chi Fu, Chi-Hua Fu, Kuotang Cheng, Bo-Tsun Liu, Tsung Chuan Lee
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Patent number: 11720025Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: GrantFiled: June 23, 2022Date of Patent: August 8, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Yu-Hsun Wu, Bo-Tsun Liu, Tsung-Chuan Lee
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Publication number: 20230236498Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.Type: ApplicationFiled: March 27, 2023Publication date: July 27, 2023Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Tsung Chuan LEE, Hao-Shiang CHANG
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Patent number: 11703762Abstract: A method of generating a layout pattern includes disposing a photoresist layer of a resist material on a substrate and disposing a top layer over of the photoresist layer. The top layer is transparent for extreme ultraviolet (EUV) radiation and the top layer is opaque for deep ultraviolet (DUV) radiation. The method further includes irradiating the photoresist layer with radiation generated from an EUV radiation source. The radiation passes through the top layer to expose the photoresist layer.Type: GrantFiled: October 24, 2019Date of Patent: July 18, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Chen-Ming Wang, Yahru Cheng, Bo-Tsun Liu, Tsung Chuan Lee
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Patent number: 11614683Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.Type: GrantFiled: July 21, 2022Date of Patent: March 28, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Tsung Chuan Lee, Hao-Shiang Chang
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Publication number: 20230073062Abstract: A method for preventing photomask contamination includes securing a photomask on a bottom surface of an electrostatic chuck; generating a first voltage at a peripheral area of the bottom surface of the electrostatic chuck to attract a particle onto the peripheral area of the bottom surface of the electrostatic chuck, wherein the peripheral area of the bottom surface of the electrostatic chuck is not directly above the photomask; after generating the first voltage, generating a second voltage at the peripheral area of the bottom surface of the electrostatic chuck to repulse the particle, wherein the first voltage and the second voltage have opposite electrical properties; and generating a third voltage, by using a collecting plate, near a sidewall of the photomask to attract the repulsed particle.Type: ApplicationFiled: November 16, 2022Publication date: March 9, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jui-Chieh CHEN, Tsung-Chih CHIEN, Chih-Tsung SHIH, Tsung-Chuan LEE
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Publication number: 20220373890Abstract: A method of generating a layout pattern includes disposing a photoresist layer of a resist material on a substrate and disposing a top layer over of the photoresist layer. The top layer is transparent for extreme ultraviolet (EUV) radiation and the top layer is opaque for deep ultraviolet (DUV) radiation. The method further includes irradiating the photoresist layer with radiation generated from an EUV radiation source. The radiation passes through the top layer to expose the photoresist layer.Type: ApplicationFiled: July 27, 2022Publication date: November 24, 2022Inventors: Chih-Tsung SHIH, Chen-Ming WANG, Yahru CHENG, Bo-Tsun LIU, Tsung Chuan LEE
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Patent number: 11506985Abstract: A method for preventing photomask contamination includes generating a first electric field from an electrostatic chuck to attract a charged particle onto the electrostatic chuck, controlling the first electric field to detach the charged particle from the electrostatic chuck, and generating a second electric field below the electrostatic chuck to attract the charged particle.Type: GrantFiled: April 29, 2019Date of Patent: November 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jui-Chieh Chen, Tsung-Chih Chien, Chih-Tsung Shih, Tsung-Chuan Lee
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Publication number: 20220357651Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.Type: ApplicationFiled: July 21, 2022Publication date: November 10, 2022Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Tsung Chuan LEE, Hao-Shiang CHANG
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Publication number: 20220326598Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: ApplicationFiled: June 23, 2022Publication date: October 13, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung SHIH, Yu-Hsun WU, Bo-Tsun LIU, Tsung-Chuan LEE
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Patent number: 11415879Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.Type: GrantFiled: March 5, 2021Date of Patent: August 16, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Tsung Chuan Lee, Hao-Shiang Chang
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Patent number: 11392022Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: GrantFiled: June 12, 2020Date of Patent: July 19, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Yu-Hsun Wu, Bo-Tsun Liu, Tsung-Chuan Lee
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Publication number: 20220197127Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: ApplicationFiled: March 14, 2022Publication date: June 23, 2022Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Shih-Chi FU, Chi-Hua FU, Kuotang CHENG, Bo-Tsun LIU, Tsung Chuan LEE
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Patent number: 11275301Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: GrantFiled: August 2, 2019Date of Patent: March 15, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Shih-Chi Fu, Chi-Hua Fu, Kuotang Cheng, Bo-Tsun Liu, Tsung Chuan Lee
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Publication number: 20210389661Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: ApplicationFiled: June 12, 2020Publication date: December 16, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung SHIH, Yu-Hsun WU, Bo-Tsun LIU, Tsung-Chuan LEE
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Patent number: 11119420Abstract: In accordance with some embodiments, a method for processing a semiconductor wafer is provided. The method includes transporting a carrier along with a reticle supported by the carrier in a lithography exposure apparatus. The method also includes regulating particles in the carrier through a magnetic field. In addition, the method includes removing the reticle from the carrier. The method further includes performing, using the reticle, a lithography exposure process to the semiconductor wafer in the lithography exposure apparatus.Type: GrantFiled: May 27, 2020Date of Patent: September 14, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Wei Lee, Jui-Chieh Chen, Chih-Tsung Shih, Tsung-Chuan Lee
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Publication number: 20210191283Abstract: In accordance with some embodiments, a method for processing a semiconductor wafer is provided. The method includes transporting a carrier along with a reticle supported by the carrier in a lithography exposure apparatus. The method also includes regulating particles in the carrier through a magnetic field. In addition, the method includes removing the reticle from the carrier. The method further includes performing, using the reticle, a lithography exposure process to the semiconductor wafer in the lithography exposure apparatus.Type: ApplicationFiled: May 27, 2020Publication date: June 24, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yi-Wei LEE, Jui-Chieh CHEN, Chih-Tsung SHIH, Tsung-Chuan LEE
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Patent number: 10976674Abstract: An extreme ultraviolet (EUV) lithography system includes an extreme ultraviolet (EUV) radiation source to emit EUV radiation, a collector for collecting the EUV radiation and focusing the EUV radiation, a reticle stage for supporting a reticle including a pellicle for exposure to the EUV radiation, and at least one sensor configured to detect particles generated due to breakage of the pellicle.Type: GrantFiled: August 14, 2019Date of Patent: April 13, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung Shih, Bo-Tsun Liu, Tsung Chuan Lee