Patents by Inventor TSUNG-HAN KUO

TSUNG-HAN KUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240087877
    Abstract: A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Tsung-Te CHIU, Kechuang LIN, Houng-Chi WEI, Chia-Chu KUO, Bing-Han CHUANG
  • Publication number: 20230386806
    Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Inventors: Tsung-Han Kuo, Po-Shu Wang, Wei-Ming Wang
  • Patent number: 11776796
    Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 3, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Han Kuo, Po-Shu Wang, Wei-Ming Wang
  • Publication number: 20210327693
    Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Tsung-Han KUO, Po-Shu WANG, Wei-Ming WANG
  • Patent number: 11056324
    Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Han Kuo, Po-Shu Wang, Wei-Ming Wang
  • Publication number: 20200051799
    Abstract: A system and method for reducing particle contamination on substrates during a deposition process using a particle control system is disclosed here. In one embodiment, a film deposition system includes: a processing chamber sealable to create a pressurized environment and configured to contain a plasma, a target and a substrate in the pressurized environment; and a particle control unit, wherein the particle control unit is configured to provide an external force to each of at least one charged atom and at least one contamination particle in the plasma, wherein the at least one charged atom and the at last one contamination particle are generated by the target when it is in direct contact with the plasma, wherein the external force is configured to direct the at least one charged atom to a top surface of the substrate and to direct the at least one contamination particle away from the top surface of the substrate.
    Type: Application
    Filed: August 2, 2019
    Publication date: February 13, 2020
    Inventors: Tsung-Han KUO, Po-Shu WANG, Wei-Ming WANG
  • Patent number: 9673248
    Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. BSI image sensor includes a semiconductive substrate, a dielectric layer over the semiconductive substrate, and a pixel region. The pixel region includes a transistor disposed at a front side of the semiconductive substrate. The transistor includes a gate structure and at least a source region or a drain region. The transistor is coupled to a contact disposed in the dielectric layer. An oxide layer covers the gate structure and at least the source region or the drain region. A nitride layer covers the gate structure and at least the source region or the drain region. A color filter is disposed at a back side of the semiconductive substrate.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: June 6, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsung-Han Kuo, Chung-Chuan Tseng, Li-Hsin Chu, Zhi-Wei Zhuang
  • Publication number: 20160240569
    Abstract: Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. BSI image sensor includes a semiconductive substrate, a dielectric layer over the semiconductive substrate, and a pixel region. The pixel region includes a transistor disposed at a front side of the semiconductive substrate. The transistor includes a gate structure and at least a source region or a drain region. The transistor is coupled to a contact disposed in the dielectric layer. An oxide layer covers the gate structure and at least the source region or the drain region. A nitride layer covers the gate structure and at least the source region or the drain region. A color filter is disposed at a back side of the semiconductive substrate.
    Type: Application
    Filed: February 13, 2015
    Publication date: August 18, 2016
    Inventors: TSUNG-HAN KUO, CHUNG-CHUAN TSENG, LI-HSIN CHU, ZHI-WEI ZHUANG