Abstract: A buck-boost switching power circuit comprises a bypass control circuit which configured to determine whether the buck-boost switching power circuit operates in a bypass mode according to a bypass enable signal. When the conversion voltage difference between the input voltage and the output voltage is less than a reference voltage, the bypass control circuit controls to electrically connect the input power source with the output power source, and operates the buck-boost switching power circuit in the bypass phase of the bypass mode. Before and/or after the bypass phase, the bypass control circuit respectively controls the buck-boost switching power circuit to operate in a first transition phase and/or a second transition phase.

Abstract: A constant time buck-boost switching converter includes: a power switch circuit for switching a first terminal of an inductor between an input voltage and a ground, and for switching a second terminal of the inductor between an output voltage and the ground; and a modulation control circuit for generating a buck ramp signal and a boost ramp signal and for controlling the inductor according to comparisons of these two ramp signals with an error amplification signal, so as to convert the input voltage to the output voltage. The average levels of the buck ramp signal and the boost ramp signal are both equal to a product of the output voltage multiplied by a predetermined ratio. The upper limit of the buck ramp signal and the lower limit of the boost ramp signal are both equal to a product of the input voltage multiplied by the predetermined ratio.

Abstract: A lifting module for a chassis and an electronic device including the lifting module are provided. The lifting module includes a sidewall bracket, a lifting bracket, a sliding button assembly, and a driven assembly. The sidewall bracket is disposed on a side frame of the chassis. The lifting bracket is movably connected to the sidewall bracket. The sliding button assembly is slidably disposed on the side frame of the chassis. Part of the sliding button assembly is exposed from the chassis. The driven assembly is movably disposed on the sidewall bracket. The driven assembly is connected to interact the sliding button assembly and the lifting bracket. The lifting bracket is driven to move relative to the sidewall bracket selectively by the sliding button assembly through the driven assembly.

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for efficiently accessing memory in a computing system. An example method includes organizing a plurality of physical memory banks having a base size into a plurality of logical memory banks. A request to execute operations on the plurality of physical memory banks is received. The request to execute the operations comprises a request to interact with data having a sample width based on the base size. Responsive to receiving the request to execute the operations, the operations are executed on one or more logical memory banks of the plurality of logical memory banks via a memory crossbar shared across the plurality of logical memory banks. An amount of the data on which the operations are executed is a multiple of the sample width, and each logical memory bank has a size based on the base size and a multiplier value.

Abstract: A multi-loop error amplifier circuit for generating an error amplification signal includes: a first operational transconductance amplifier (OTA) including a first current output stage which generates a first transconductance amplification current in a predetermined current direction according to a first voltage difference between a positive terminal and a negative input terminal of the first OTA; a second OTA including a second current output stage which generates a second transconductance amplification current in the predetermined current direction according to a second voltage difference between a positive terminal and a negative input terminal of the second OTA. The first and the second current output stages are coupled in series to generate a first error output current. The error amplification signal is generated according to the first error output current which is equal to the smaller one of the first and the second transconductance amplification currents.

Abstract: A multi-loop error amplifier circuit for generating an error amplification signal includes: a first operational transconductance amplifier (OTA) including a first current output stage which generates a first transconductance amplification current in a predetermined current direction according to a first voltage difference between a positive terminal and a negative input terminal of the first OTA; a second OTA including a second current output stage which generates a second transconductance amplification current in the predetermined current direction according to a second voltage difference between a positive terminal and a negative input terminal of the second OTA. The first and the second current output stages are coupled in series to generate a first error output current. The error amplification signal is generated according to the first error output current which is equal to the smaller one of the first and the second transconductance amplification currents.

Abstract: A constant time buck-boost switching converter includes: a power switch circuit for switching a first terminal of an inductor between an input voltage and a ground, and for switching a second terminal of the inductor between an output voltage and the ground; and a modulation control circuit for generating a buck ramp signal and a boost ramp signal and for controlling the inductor according to comparisons of these two ramp signals with an error amplification signal, so as to convert the input voltage to the output voltage. The average levels of the buck ramp signal and the boost ramp signal are both equal to a product of the output voltage multiplied by a predetermined ratio. The upper limit of the buck ramp signal and the lower limit of the boost ramp signal are both equal to a product of the input voltage multiplied by the predetermined ratio.