Patents by Inventor Tsung-Hsien Liu

Tsung-Hsien Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129167
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Patent number: 11935871
    Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
  • Publication number: 20240084135
    Abstract: A resin composition and uses thereof are provided. The resin composition includes: (A) an epoxy resin; (B) a bismaleimide resin; and (C) a first flame retardant having a structure of formula (I): Wherein Ar is a C3 to C18 heteroaryl or a C6 to C18 aryl; R1 is H or a C1 to C18 alkyl; and R2 and R3 are independently H, a C1 to C18 alkyl, a C3 to C18 heteroaryl, or a C6 to C18 aryl.
    Type: Application
    Filed: December 7, 2022
    Publication date: March 14, 2024
    Inventors: Tsung-Hsien LIN, Shur-Fen LIU, Pin CHIEN, Kai-Cheng YANG
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20180006187
    Abstract: An optoelectronic semiconductor device comprises a barrier layer, a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant, and a second semiconductor layer beneath the barrier layer, the second semiconductor comprising the second dopant, wherein, in the first semiconductor layer, a concentration of the first dopant is larger than a concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is larger than that in the first semiconductor layer.
    Type: Application
    Filed: August 28, 2017
    Publication date: January 4, 2018
    Inventors: Tsung-Hsien LIU, Rong-Ren LEE, Shih-Chang LEE
  • Patent number: 9768351
    Abstract: An optoelectronic semiconductor device comprises a barrier layer, a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant, and a second semiconductor layer beneath the barrier layer, the second semiconductor comprising the second dopant, wherein, in the first semiconductor layer, a concentration of the first dopant is larger than a concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is larger than that in the first semiconductor layer.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: September 19, 2017
    Assignee: Epistar Corporation
    Inventors: Tsung-Hsien Liu, Rong-Ren Lee, Shih-Chang Lee
  • Patent number: 9276173
    Abstract: A light-emitting device comprises: a light-emitting stack having an upper side, a first edge having an end point, and a second edge opposite to the first edge; a first bonding region arranged on the upper side, near the first edge, and far from the end point; a second bonding region separated from to the first bonding region by a first distance and being far from the end point; a third bonding region arranged on the upper side; a fourth bonding region separated from the third bonding region by a second distance longer than the first distance; a first electrode connected to the first bonding region; a second electrode connected to the second bonding region; a third electrode connected to the third bonding region; a fourth electrode connected to the fourth bonding region; and a fifth electrode connected to the first bonding region and pointing to the fourth bonding region.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 1, 2016
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Shen, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh
  • Publication number: 20150060877
    Abstract: An optoelectronic semiconductor device comprises a barrier layer, a first semiconductor layer on the barrier layer, the first semiconductor layer comprising a first dopant and a second dopant, and a second semiconductor layer beneath the barrier layer, the second semiconductor comprising the second dopant, wherein, in the first semiconductor layer, a concentration of the first dopant is larger than a concentration of the second dopant, and the concentration of the second dopant in the second semiconductor layer is larger than that in the first semiconductor layer.
    Type: Application
    Filed: September 2, 2014
    Publication date: March 5, 2015
    Inventors: Tsung-Hsien LIU, Rong-Ren LEE, Shih-Chang LEE
  • Publication number: 20140367733
    Abstract: A light-emitting device comprises: a light-emitting stack having an upper side, a first edge having an end point, and a second edge opposite to the first edge; a first bonding region arranged on the upper side, near the first edge, and far from the end point; a second bonding region separated from to the first bonding region by a first distance and being far from the end point; a third bonding region arranged on the upper side; a fourth bonding region separated from the third bonding region by a second distance longer than the first distance; a first electrode connected to the first bonding region; a second electrode connected to the second bonding region; a third electrode connected to the third bonding region; a fourth electrode connected to the fourth bonding region; and a fifth electrode connected to the first bonding region and pointing to the fourth bonding region.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 18, 2014
    Inventors: Chien-Fu SHEN, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh
  • Patent number: 8823039
    Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a light-emitting stack having an upper surface and a lower surface; a pad, arranged on the upper surface, comprising: a first bonding region; and a second bonding region physically connected to the first bonding region through a connecting region having a connecting width; a first electrode connected to the first bonding region; a second electrode connected to the second bonding region; and a third electrode extending from the pad and arranged between the first electrode and the second electrode. At least one of the first electrode, the second electrode, and the third electrode has a width smaller than the connecting width.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: September 2, 2014
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Shen, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh
  • Publication number: 20120211794
    Abstract: This disclosure discloses a light-emitting device. The light-emitting device comprises: a light-emitting stack having an upper surface and a lower surface; a pad, arranged on the upper surface, comprising: a first bonding region; and a second bonding region physically connected to the first bonding region through a connecting region having a connecting width; a first electrode connected to the first bonding region; a second electrode connected to the second bonding region; and a third electrode extending from the pad and arranged between the first electrode and the second electrode. At least one of the first electrode, the second electrode, and the third electrode has a width smaller than the connecting width.
    Type: Application
    Filed: April 30, 2012
    Publication date: August 23, 2012
    Applicant: EPISTAR CORPORATION
    Inventors: Chien-Fu SHEN, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh
  • Patent number: 8188505
    Abstract: A light-emitting device comprises a substrate, an epitaxial structure formed on the substrate including a first semiconductor layer, a second semiconductor layer, and a light-emitting layer formed between the first semiconductor layer and the second semiconductor layer. A trench is formed in the epitaxial structure to expose a part of side surface of the epitaxial structure and a part of surface of the first semiconductor layer, so that a first conductive structure is formed on the part of surface of the first semiconductor layer in the trench, and a second conductive structure is formed on the second semiconductor layer. The first conductive structure includes a first electrode and a first pad electrically contacted with each other. The second conductive structure includes a second electrode and a second pad electrically contacted with each other. Furthermore, the area of at least one of the first pad and the second pad is between 1.5×104?m2 and 6.2×104 ?m2.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: May 29, 2012
    Assignee: Epistar Corporation
    Inventors: Chien-Fu Shen, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh
  • Publication number: 20100258171
    Abstract: A solar photovoltaic device is provided and includes a solar cell body, a window layer on the solar cell body, and a current collection layer on the window layer. The current collection layer includes a patterned structure, and a portion of the window layer is exposed by the patterned structure.
    Type: Application
    Filed: April 9, 2010
    Publication date: October 14, 2010
    Inventors: Yung-Szu Su, Tsung-Hsien Liu, Wu-Tsung Lo, Shih-Chang Lee, Yu-Chih Yang
  • Publication number: 20100193019
    Abstract: The application discloses a solar cell having a lower series resistance by designing the sectional configuration of the electrode and adjusting the distance of the neighboring two electrodes and the width of the electrode while the quantity of the incident light is not impaired thereof.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 5, 2010
    Inventors: Tsung-Hsien Liu, Yu-Ling Chin
  • Publication number: 20100132124
    Abstract: A system, apparatus and method for controlling an internal pressure of an inflatable pad are disclosed. The apparatus includes a control valve, a sensor, a driving device and a controller. The control valve is switched between statuses to selectively perform inflation and deflation of the inflatable pad. The sensor measures the internal pressure of the inflatable pad. The driving device is coupled to the control valve to blow air into the inflatable pad. The controller is coupled to the control valve for controlling the internal pressure at a predetermined pressure. Responsive to the present of a user, the controller deflates the inflatable pad within a deflation period and records the internal pressure during the deflation period. A characteristic curve is obtained representing the variation of the internal pressure corresponding to the user and an appropriate pressure is determined based on the characteristic curve.
    Type: Application
    Filed: December 1, 2008
    Publication date: June 3, 2010
    Inventors: Tsung Hsien Liu, Yu-Huang Lin, Ho Yu Lin
  • Publication number: 20090140280
    Abstract: A light-emitting device comprises a substrate, an epitaxial structure formed on the substrate including a first semiconductor layer, a second semiconductor layer, and a light-emitting layer formed between the first semiconductor layer and the second semiconductor layer. A trench is formed in the epitaxial structure to expose a part of side surface of the epitaxial structure and a part of surface of the first semiconductor layer, so that a first conductive structure is formed on the part of surface of the first semiconductor layer in the trench, and a second conductive structure is formed on the second semiconductor layer. The first conductive structure includes a first electrode and a first pad electrically contacted with each other. The second conductive structure includes a second electrode and a second pad electrically contacted with each other. Furthermore, the area of at least one of the first pad and the second pad is between 1.5×104 ?m and 6.2×104 ?m.
    Type: Application
    Filed: November 21, 2008
    Publication date: June 4, 2009
    Applicant: EPISTAR CORPORATION
    Inventors: Chien-Fu Shen, Cheng-Ta Kuo, Wei-Shou Chen, Tsung-Hsien Liu, Yi-Wen Ku, Min-Hsun Hsieh