Patents by Inventor Tsung-Hsin Chou

Tsung-Hsin Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9479365
    Abstract: A method for performing loop unrolled decision feedback equalization (DFE) and an associated apparatus are provided.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 25, 2016
    Assignee: MEDIATEK INC.
    Inventors: Tsung-Hsin Chou, Chih-Hsien Lin, Huai-Te Wang, Bo-Jiun Chen, Yan-Bin Luo
  • Patent number: 9379921
    Abstract: A method for performing data sampling control in an electronic device and an associated apparatus are provided, where the method includes the steps of: detecting whether a data pattern of a received signal of a decision feedback equalizer (DFE) receiver in the electronic device matches a predetermined data pattern, to selectively trigger a data sampling time shift configuration of the DFE receiver; and when the data sampling time shift configuration is triggered, utilizing a phase shift clock, rather than a normal clock corresponding to a normal configuration of the DFE receiver, as an edge sampler clock of an edge sampler in the DFE receiver, to lock onto edge timing of the received signal, and controlling the phase shift clock and the normal clock to have different phases, respectively, to shift data sampling time of the DFE receiver, for performing data sampling in the DFE receiver.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: June 28, 2016
    Assignee: MEDIATEK INC.
    Inventors: Huai-Te Wang, Tsung-Hsin Chou, Chih-Hsien Lin, Bo-Jiun Chen, Yan-Bin Luo
  • Publication number: 20160065397
    Abstract: A method for performing loop unrolled decision feedback equalization (DFE) and an associated apparatus are provided.
    Type: Application
    Filed: June 12, 2015
    Publication date: March 3, 2016
    Inventors: Tsung-Hsin Chou, Chih-Hsien Lin, Huai-Te Wang, Bo-Jiun Chen, Yan-Bin Luo
  • Publication number: 20160056980
    Abstract: A method for performing data sampling control in an electronic device and an associated apparatus are provided, where the method includes the steps of: detecting whether a data pattern of a received signal of a decision feedback equalizer (DFE) receiver in the electronic device matches a predetermined data pattern, to selectively trigger a data sampling time shift configuration of the DFE receiver; and when the data sampling time shift configuration is triggered, utilizing a phase shift clock, rather than a normal clock corresponding to a normal configuration of the DFE receiver, as an edge sampler clock of an edge sampler in the DFE receiver, to lock onto edge timing of the received signal, and controlling the phase shift clock and the normal clock to have different phases, respectively, to shift data sampling time of the DFE receiver, for performing data sampling in the DFE receiver.
    Type: Application
    Filed: June 16, 2015
    Publication date: February 25, 2016
    Inventors: Huai-Te Wang, Tsung-Hsin Chou, Chih-Hsien Lin, Bo-Jiun Chen, Yan-Bin Luo