Abstract: A method includes forming isolations extending into a semiconductor substrate, recessing the isolation regions, wherein a semiconductor region between the isolation regions forms a semiconductor fin, forming a first dielectric layer on the isolation regions and the semiconductor fin, forming a second dielectric layer over the first dielectric layer, planarizing the second dielectric layer and the first dielectric layer, and recessing the first dielectric layer. A portion of the second dielectric layer protrudes higher than remaining portions of the first dielectric layer to form a protruding dielectric fin. A portion of the semiconductor fin protrudes higher than the remaining portions of the first dielectric layer to form a protruding semiconductor fin. A portion of the protruding semiconductor fin is recessed to form a recess, from which an epitaxy semiconductor region is grown. The epitaxy semiconductor region expands laterally to contact a sidewall of the protruding dielectric fin.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.

Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.

Abstract: A semiconductor isolation structure includes a silicon-on-insulator wafer, a first deep trench isolation structure and a second deep trench isolation structure. The silicon-on-insulator wafer includes a semiconductor substrate, a buried insulation layer disposed on the semiconductor substrate, and a semiconductor layer disposed on the buried insulation layer. The semiconductor layer has a functional region. The first deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional region. The second deep trench isolation structure penetrates semiconductor layer and the buried insulation layer, and surrounds the first deep trench isolation structure.

Abstract: A wearable device and a head strap module are provided. The wearable device includes a host and a head strap module. Two opposite sides of the host are provided with a first bracket and a second bracket. The first bracket has a first end. The second bracket has a second end. The head strap module includes a first belt, a second belt, and an adjustment mechanism. The first belt has a third end. The second belt has a fourth end. The third end and the fourth end are detachably assembled to the first end and the second end respectively. The adjustment mechanism is arranged at the overlapping position of the first belt and the second belt for adjusting the overlapping length of the first belt and the second belt.

Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.

Abstract: A method for eliminating divot formation includes forming an isolation layer; forming a conduction layer which has an upper inclined boundary with the isolation layer such that the conduction layer has a portion located above a portion of the isolation layer at the upper inclined boundary; etching back the isolation layer; and etching back the conduction layer after etching back the isolation layer such that a top surface of the etched conduction layer is located at a level lower than a top surface of the etched isolation layer.

Abstract: A method for eliminating divot formation includes forming an isolation layer; forming a conduction layer which has an upper inclined boundary with the isolation layer such that the conduction layer has a portion located above a portion of the isolation layer at the upper inclined boundary; etching back the isolation layer; and etching back the conduction layer after etching back the isolation layer such that a top surface of the etched conduction layer is located at a level lower than a top surface of the etched isolation layer.

Abstract: A semiconductor isolation structure includes a silicon-on-insulator wafer, a first deep trench isolation structure and a second deep trench isolation structure. The silicon-on-insulator wafer includes a semiconductor substrate, a buried insulation layer disposed on the semiconductor substrate, and a semiconductor layer disposed on the buried insulation layer. The semiconductor layer has a functional region. The first deep trench isolation structure penetrates the semiconductor layer and the buried insulation layer, and surrounds the functional region. The second deep trench isolation structure penetrates semiconductor layer and the buried insulation layer, and surrounds the first deep trench isolation structure.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.

Abstract: A method for eliminating divot formation includes forming an isolation layer; forming a conduction layer which has an upper inclined boundary with the isolation layer such that the conduction layer has a portion located above a portion of the isolation layer at the upper inclined boundary; etching back the isolation layer; and etching back the conduction layer after etching back the isolation layer such that a top surface of the etched conduction layer is located at a level lower than a top surface of the etched isolation layer.

Abstract: A semiconductor structure includes a substrate, a device, a contact via, a metal/dielectric layer, and a test structure. The device is over the substrate. The contact via is connected to the device. The metal/dielectric layer is over the contact via. The metal/dielectric layer includes a first portion and a second portion. The first portion of the metal/dielectric layer has a metallization pattern connected to the contact via. The second portion of the metal/dielectric layer is void of metal. The test structure is over the second portion of the metal/dielectric layer.

Abstract: A semiconductor structure includes a substrate, a device, a contact via, a metal/dielectric layer, and a test structure. The device is over the substrate. The contact via is connected to the device. The metal/dielectric layer is over the contact via. The metal/dielectric layer includes a first portion and a second portion. The first portion of the metal/dielectric layer has a metallization pattern connected to the contact via. The second portion of the metal/dielectric layer is void of metal. The test structure is over the second portion of the metal/dielectric layer.

Abstract: A flexible liquid crystal display and a flexible fluid display are provided. The flexible liquid crystal display includes a first module, a second module, at least two supporting structures and a liquid crystal layer. The second module is disposed correspondingly to the first module. The supporting structures are separately disposed between the first module and the second module and used for abutting the first module and the second module, so that a space between the first module and the second module is divided into a flexible area and two non-flexible areas. The flexible area is located between the two non-flexible areas. The liquid crystal layer is disposed in the flexible area and the two non-flexible areas.

Abstract: A method for fabricating a photo spacer and an array substrate having the photo spacer are provided. At least one exposure process, a developing process, and a baking process are performed to a photo-sensitive material layer formed a substrate to fabricate a photo spacer, wherein the at least one exposure process includes a back side exposure process. The substrate has a light transmitting region and a light shielding region so that the photo-sensitive material layer is defined into a first block and a second block after the back side exposure process. The developing process is performed to at least remove the second block. A front side exposure process is performed to the first block. The baking process is performed to cure the first block of the photo-sensitive material layer to form a photo spacer.

Abstract: A flexible liquid crystal display and a flexible fluid display are provided. The flexible liquid crystal display includes a first module, a second module, at least two supporting structures and a liquid crystal layer. The second module is disposed correspondingly to the first module. The supporting structures are separately disposed between the first module and the second module and used for abutting the first module and the second module, so that a space between the first module and the second module is divided into a flexible area and two non-flexible areas. The flexible area is located between the two non-flexible areas. The liquid crystal layer is disposed in the flexible area and the two non-flexible areas.

Abstract: A flexible liquid crystal display and a flexible fluid display are provided. The flexible liquid crystal display includes a first module, a second module, at least two supporting structures and a liquid crystal layer. The second module is disposed correspondingly to the first module. The supporting structures are separately disposed between the first module and the second module and used for abutting the first module and the second module, so that a space between the first module and the second module is divided into a flexible area and two non-flexible areas. The flexible area is located between the two non-flexible areas. The liquid crystal layer is disposed in the flexible area and the two non-flexible areas.

Abstract: A display includes a flexible display panel having a back face, two backlight modules disposed on the back face of the display panel and each including a contact end, and an outer casing having two casing panels respectively connected to and supporting the backlight modules oppositely of the display panel. The casing panels are pivotal to move the backlight modules and the display panel between collapsed and non-collapsed positions. In the collapsed position, the display panel is folded, and the backlight modules are parallelly spaced apart. In the non-collapsed position, the display panel is laid flat, the backlight modules coplanarly cover the back face of the display panel, and the contact ends of the backlight modules abut against each other.

Abstract: A display includes an outer casing, two backlight modules, and a flexible display panel. The outer casing includes at least one connecting member having two connecting ends respectively disposed at left and right sides thereof, and two casing panels connected respectively to the connecting ends and respectively having bonding faces. The two backlight modules are disposed respectively on the bonding faces of the casing panels. The flexible display panel includes two side panel sections disposed respectively on the backlight modules, and a foldable intermediate section connected between the side panel sections. The casing panels are pivotal relative to each other to move the backlight modules and the flexible display panel to an unfolded position. The backlight modules coplanarly cover a backside of the flexible display panel in the unfolded position.

Abstract: A method for fabricating a photo spacer and an array substrate having the photo spacer are provided. At least one exposure process, a developing process, and a baking process are performed to a photo-sensitive material layer formed a substrate to fabricate a photo spacer, wherein the at least one exposure process includes a back side exposure process. The substrate has a light transmitting region and a light shielding region so that the photo-sensitive material layer is defined into a first block and a second block after the back side exposure process. The developing process is performed to at least remove the second block. A front side exposure process is performed to the first block. The baking process is performed to cure the first block of the photo-sensitive material layer to form a photo spacer.