Patents by Inventor Tsung-Hui Chou

Tsung-Hui Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9842870
    Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.
    Type: Grant
    Filed: June 3, 2017
    Date of Patent: December 12, 2017
    Assignee: Powerchip Technology Corporation
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Che-Hung Lin, Shao-Wei Lu, Hsiao-Pei Lin
  • Publication number: 20170271388
    Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.
    Type: Application
    Filed: June 3, 2017
    Publication date: September 21, 2017
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Che-Hung Lin, Shao-Wei Lu, Hsiao-Pei Lin
  • Patent number: 9704898
    Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: July 11, 2017
    Assignee: Powerchip Technology Corporation
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Che-Hung Lin, Shao-Wei Lu, Hsiao-Pei Lin
  • Patent number: 9679934
    Abstract: A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: June 13, 2017
    Assignee: Powerchip Technology Corporation
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Hsu-Ting Chang
  • Publication number: 20170098677
    Abstract: A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad.
    Type: Application
    Filed: December 20, 2016
    Publication date: April 6, 2017
    Applicant: Powerchip Technology Corporation
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Hsu-Ting Chang
  • Patent number: 9613995
    Abstract: A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 4, 2017
    Assignee: Powerchip Technology Corporation
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Hsu-Ting Chang
  • Publication number: 20170016830
    Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.
    Type: Application
    Filed: January 5, 2016
    Publication date: January 19, 2017
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Che-Hung Lin, Shao-Wei Lu, Hsiao-Pei Lin
  • Publication number: 20170012070
    Abstract: A semiconductor device including a substrate, at least one sensor, a dielectric layer, at least one light pipe structure, at least one pad, a shielding layer, and a protection layer is provided. The sensor is located in the substrate of a first region. The dielectric layer is located on the substrate. The light pipe structure is located in the dielectric layer of the first region. The light pipe structure corresponds to the sensor. The pad is located in the dielectric layer of a second region. The shielding layer is located on the dielectric layer, wherein the light pipe structure is surrounded by the shielding layer. The protection layer is located on the shielding layer. At least one pad opening is disposed in the dielectric layer, the shielding layer, and the protection layer above the pad. The pad opening exposes a top surface of the corresponding pad.
    Type: Application
    Filed: September 25, 2015
    Publication date: January 12, 2017
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Hsu-Ting Chang
  • Publication number: 20160118433
    Abstract: A semiconductor fabrication method is disclosed. A substrate having thereon a plurality of semiconductor elements are provided. A dielectric layer is formed on the substrate. A plurality of openings is etched into the dielectric layer to respectively reveal the semiconductor elements. A material layer is coated on the substrate and the material layer fills into the openings. The material layer is then subjected to exposure and development processes to remove a portion of the material layer, thereby forming a material pattern. The material pattern is then polished by chemical mechanical polishing.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 28, 2016
    Inventors: Tse-Wei Chung, Tsung-Hui Chou, Yu-Yuan Lai