Patents by Inventor Tsung-Jen Lin

Tsung-Jen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200090970
    Abstract: The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.
    Type: Application
    Filed: September 18, 2018
    Publication date: March 19, 2020
    Inventors: Tsung-Jen Liao, Pei-Haw Tsao, Tsui-Mei Chen, Yu-Jung Lin, Ju-Min Chen, Sean Lin
  • Publication number: 20200083185
    Abstract: Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 12, 2020
    Inventors: Jung Wei Cheng, Hai-Ming Chen, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang, Ming-Che Liu, Tsung-Ding Wang
  • Publication number: 20200070005
    Abstract: A muscle training equipment configured to train at least one target muscle of human body and including frame, at least one vibration detector, and at least one resistance adjustment assembly. The at least one vibration detector is configured to be disposed on the at least one target muscle so as to produce at least one muscle vibration signal based on the activity of the at least one target muscle. The at least one resistance adjustment assembly includes motor, handle and linkage assembly. The motor is disposed on the frame and has resistance-adjustable shaft. An end of the linkage assembly is fixed to the resistance-adjustable shaft, and another end of the linkage assembly is pivotally connected to the handle. The at least one resistance adjustment assembly is configured to adjust a resistance force applied on the resistance-adjustable shaft according to the at least one muscle vibration signal.
    Type: Application
    Filed: August 16, 2019
    Publication date: March 5, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tsung-Chi LIN, Jyun-Liang PAN, Kai-Jen PAI, Zhong-We LIAO, Yen-Chung CHANG, Szu-Han TZAO, Ching Yi LIU
  • Patent number: 10546979
    Abstract: A display includes a light source, wherein the light source includes a base plate, a light emitting unit, and a light converting component. The light emitting unit is disposed on the base plate and has a first top surface. The light converting component covers the light emitting unit and has a second top surface and plural light converting elements, wherein the first top surface is located between the second top surface and the base plate. The light converting component includes a first region, a second region, and a third region from the first top surface to the second top surface, wherein a first sulfur content of the first region is less than a second sulfur content of the second region, and the first sulfur content of the first region is less than a third sulfur content of the third region.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: January 28, 2020
    Assignee: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Hsiao-Lang Lin, Jui-Jen Yueh, Kuan-Feng Lee
  • Publication number: 20200020548
    Abstract: A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump.
    Type: Application
    Filed: September 23, 2019
    Publication date: January 16, 2020
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsiun Lee
  • Patent number: 10535523
    Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: January 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yu Lin, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
  • Patent number: 10522486
    Abstract: Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: December 31, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung Wei Cheng, Hai-Ming Chen, Chien-Hsun Lee, Hao-Cheng Hou, Hung-Jen Lin, Chun-Chih Chuang, Ming-Che Liu, Tsung-Ding Wang
  • Patent number: 10505015
    Abstract: A memory device includes a semiconductor substrate and a pair of control gate stacks on the cell region. Each of the control gate stacks includes a storage layer and a control gate on the storage layer. The memory device includes at least one high-? metal gate stack disposed on the substrate. The high-? metal gate stack has a metal gate and a top surface of the control gate is lower than a top surface of the metal gate. The storage layer includes two oxide layers and a nitride layer, and the nitride layer is interposed in between the two oxide layers.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jing-Ru Lin, Cheng-Bo Shu, Tsung-Yu Yang, Chung-Jen Huang
  • Patent number: 10505437
    Abstract: A power converting device includes a DC-DC converting circuit, a DC-AC converting circuit, and an insulation detecting circuit. The DC-DC converting circuit is configured to convert a DC input voltage to a DC bus voltage. The DC-AC converting circuit is electrically coupled to the DC-DC converting circuit and configured to convert the DC bus voltage to an AC voltage. The insulation detecting circuit is electrically coupled between the DC-DC converting circuit and the DC-AC converting circuit. The insulation detecting circuit is configured to detect a ground impedance value of the power converting device according to the DC bus voltage.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: December 10, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Tsung-Han Tsai, Po-Jen Hou, Chen-Wei Ku, Xin-Hung Lin
  • Publication number: 20190372222
    Abstract: A multiple-frequency antenna device includes an antenna unit and a frequency switch unit. The antenna unit includes an insulating substrate on which grounded first and second conductive layers are disposed. The first conductive layer is further connected to a radio-frequency (RF) circuit. The frequency switch unit is connected to the antenna unit in parallel, and includes a switching component, and a frequency adjustment: component connected to the antenna unit. The multiple-frequency antenna device is resonant at a first resonant frequency when the switching component is switched to a first state, and is resonant at a different, second resonant frequency when the switching component is switched to a second state.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 5, 2019
    Inventors: Chih-Shen CHOU, Tsung-Shou YEH, Hsiang-Cheng YANG, Pei-Jen LIN
  • Patent number: 10497842
    Abstract: A display includes a light source, wherein the light source includes a base plate, a light emitting unit, and an encapsulation layer. The light emitting unit is disposed on the base plate and has a first top surface. The encapsulation layer covers the light emitting unit and has a second top surface and plural light converting elements, wherein the first top surface is located between the second top surface and the base plate. The encapsulation layer includes a first region, a second region, and a third region from the first top surface to the second top surface, wherein a first sulfur content of the first region is less than a second sulfur content of the second region, and the first sulfur content of the first region is less than a third sulfur content of the third region.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: December 3, 2019
    Assignee: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Hsiao-Lang Lin, Jui-Jen Yueh, Kuan-Feng Lee
  • Patent number: 10483132
    Abstract: A semiconductor device includes a passivation layer formed on a semiconductor substrate, a protective layer overlying the passivation layer and having an opening, an interconnect structure formed in the opening of the protective layer, a bump formed on the interconnect structure, and a molding compound layer overlying the interconnect structure and being in physical contact with a lower portion of the bump.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: November 19, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsun Lee
  • Publication number: 20190245115
    Abstract: A display device is disclosed, wherein the display device includes a light emitting unit, including: a first semiconductor layer; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a protecting layer disposed on the second semiconductor layer, wherein the protecting layer includes a first position and a second position, and the first position in the protection layer is closer to the second semiconductor layer than the second position in the protection layer, wherein a first oxygen atomic percentage at the first position is less than a second oxygen atomic percentage at the second position.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Inventors: Jia-Yuan CHEN, Kuan-Feng LEE, Tsung-Han TSAI, Hsiao-Lang LIN, Jui-Jen YUEH
  • Publication number: 20190172978
    Abstract: A light emitting unit and a display device is disclosed, wherein the display device includes: a light emitting unit, including: a first semiconductor layer; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a first protecting layer disposed on the second semiconductor layer, wherein the first protecting layer includes oxygen, nitrogen, and at least one element selected from the group consisting of Al, Ga, In, and Si.
    Type: Application
    Filed: December 1, 2017
    Publication date: June 6, 2019
    Inventors: Jia-Yuan CHEN, Kuan-Feng LEE, Tsung-Han TSAI, Hsiao-Lang LIN, Jui-Jen YUEH
  • Patent number: 10312414
    Abstract: A light emitting unit and a display device is disclosed, wherein the display device includes: a light emitting unit, including: a first semiconductor layer; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a first protecting layer disposed on the second semiconductor layer, wherein the first protecting layer includes oxygen, nitrogen, and at least one element selected from the group consisting of Al, Ga, In, and Si.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: June 4, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Jia-Yuan Chen, Kuan-Feng Lee, Tsung-Han Tsai, Hsiao-Lang Lin, Jui-Jen Yueh
  • Publication number: 20190162992
    Abstract: A display device includes a first display unit and a second display unit. The first display unit emits a red light having a first output spectrum corresponding to a highest gray level of the display device. The second display unit emits a blue light having a second output spectrum corresponding to the highest gray level of the display device. Wherein, an intensity integral of the first output spectrum within a range from 380 nm to 780 nm is defined as a first intensity integral, an intensity integral of the second output spectrum within a range from 494 nm to 580 nm is defined as a second intensity integral, a ratio of the second intensity integral to the first intensity integral is defined as a first ratio, and the first ratio is greater than 0% and less than or equal to 28.0%.
    Type: Application
    Filed: January 31, 2019
    Publication date: May 30, 2019
    Inventors: Hsiao-Lang Lin, Jia-Yuan Chen, Jui-Jen Yueh, Kuan-Feng Lee, Tsung-Han Tsai
  • Publication number: 20190148301
    Abstract: In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.
    Type: Application
    Filed: February 28, 2018
    Publication date: May 16, 2019
    Inventors: Tzu-Sung Huang, Hsiu-Jen Lin, Hao-Yi Tsai, Ming Hung Tseng, Tsung-Hsien Chiang, Tin-Hao Kuo, Yen-Liang Lin
  • Patent number: 7746017
    Abstract: An exemplary fan driving system includes a driving device and a MOSFET group. The driving device includes a first adjustable resistor connected between its first voltage signal input terminal and ground, and a second adjustable resistor connected between its second voltage signal input terminal and ground. The MOSFET group includes two N-type MOSFETs and two P-type MOSFETs. The first terminal of the fan is connected to an anode of D1 and a cathode of D3. The second terminal of the fan is connected to an anode of D2 and a cathode of D4. Cathodes of the D1 and D2 are configured to connect a supply voltage. Anodes of the D3 and D4 both are grounded. The fan driving system can effectively discharge off the residual current in the coil of the fan at the moment of the MOSFET group being switched off.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: June 29, 2010
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Kai-Ping Lin, Tsung-Jen Lin
  • Patent number: 7586340
    Abstract: An exemplary driving apparatus capable of generating a driving current, including: an analog input generating circuit, an analog input driving circuit, and an output circuit. The analog input generating circuit is electrically connected between a first voltage source and the ground and configured (i.e., structured and arranged) for supplying an adjustable analog signal. The analog input driving circuit is electrically connected between a second voltage source and the ground and configured for converting the analog signal into a pulsed signal. The output circuit is configured for converting the pulsed signal into a driving current as an output. The frequency of the pulsed signal can be adjusted via adjusting the analog signal and thereby varying the driving current. Thus the driving current can be adapted for the different target loads.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: September 8, 2009
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Kai-Ping Lin, Kai-Chi Lin, Tsung-Jen Lin
  • Publication number: 20090085506
    Abstract: An exemplary fan driving system includes a driving device and a MOSFET group. The driving device includes a first adjustable resistor connected between its first voltage signal input terminal and ground, and a second adjustable resistor connected between its second voltage signal input terminal and ground. The MOSFET group includes two N-type MOSFETs and two P-type MOSFETs. The first terminal of the fan is connected to an anode of D1 and a cathode of D3. The second terminal of the fan is connected to an anode of D2 and a cathode of D4. Cathodes of the D1 and D2 are configured to connect a supply voltage. Anodes of the D3 and D4 both are grounded. The fan driving system can effectively discharge off the residual current in the coil of the fan at the moment of the MOSFET group being switched off.
    Type: Application
    Filed: April 17, 2008
    Publication date: April 2, 2009
    Applicant: FITIPOWER INTEGRATED TECHNOLOGY, INC
    Inventors: KAI-PING LIN, TSUNG-JEN LIN