Patents by Inventor Tsung-Jung Chen
Tsung-Jung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978740Abstract: A layer stack including a first bonding dielectric material layer, a dielectric metal oxide layer, and a second bonding dielectric material layer is formed over a top surface of a substrate including a substrate semiconductor layer. A conductive material layer is formed by depositing a conductive material over the second bonding dielectric material layer. The substrate semiconductor layer is thinned by removing portions of the substrate semiconductor layer that are distal from the layer stack, whereby a remaining portion of the substrate semiconductor layer includes a top semiconductor layer. A semiconductor device may be formed on the top semiconductor layer.Type: GrantFiled: February 17, 2022Date of Patent: May 7, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Harry-Hak-Lay Chuang, Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien Hung Liu, Tsung-Hao Yeh, Hsien Jung Chen
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Publication number: 20240145398Abstract: A carrier structure is provided, in which at least one positioning area is defined on a chip-placement area of a package substrate, and at least one alignment portion is disposed on the positioning area. Therefore, the precision of manufacturing the alignment portion is improved by disposing the positioning area on the chip-placement area, such that the carrier structure can provide a better alignment mechanism for the chip placement operation.Type: ApplicationFiled: December 8, 2022Publication date: May 2, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Cheng-Liang HSU, Wan-Rou CHEN, Hsin-Yin CHANG, Tsung-Li LIN, Hsiu-Jung LI, Chiu-Lien LI, Fu-Quan XU, Yi-Wen LIU, Chih-Chieh SUN
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Patent number: 11963969Abstract: Provided is a pharmaceutical composition including gastrodin and a use thereof for the prevention or the treatment of amyotrophic lateral sclerosis. The pharmaceutical composition is effective in reducing neuronal axon degeneration and neurofibromin accumulation, improving symptoms of amyotrophic lateral sclerosis and extending life of patients of amyotrophic lateral sclerosis.Type: GrantFiled: September 16, 2022Date of Patent: April 23, 2024Assignee: BUDDHIST TZU CHI MEDICAL FOUNDATIONInventors: Chia-Yu Chang, Shinn-Zong Lin, Hsiao-Chien Ting, Hui-I Yang, Horng-Jyh Harn, Hong-Lin Su, Ching-Ann Liu, Yu-Shuan Chen, Tzyy-Wen Chiou, Tsung-Jung Ho
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Publication number: 20240128217Abstract: A semiconductor device includes a first semiconductor die and a second semiconductor die connected to the first semiconductor die. Each of the first semiconductor die and the second semiconductor die includes a substrate, a conductive bump formed on the substrate and a conductive contact formed on the conductive bump. The conductive contact has an outer lateral sidewall, there is an inner acute angle included between the outer lateral sidewall and the substrate is smaller than 85°, and the conductive contact of the first semiconductor die is connected opposite to the conductive contact of the second semiconductor die.Type: ApplicationFiled: January 20, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Jung CHEN, Chen Chiang YU, Wei-An TSAO, Tsung-Fu TSAI, Szu-Wei LU, Chung-Shi LIU
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Publication number: 20240105644Abstract: A semiconductor die package includes a high dielectric constant (high-k) dielectric layer over a device region of a first semiconductor die that is bonded with a second semiconductor die in a wafer on wafer (WoW) configuration. A through silicon via (TSV) structure may be formed through the device region. The high-k dielectric layer has an intrinsic negative charge polarity that provides a coupling voltage to modify the electric potential in the device region. In particular, the electron carriers in high-k dielectric layer attracts hole charge carriers in device region, which suppresses trap-assist tunnels that result from surface defects formed during etching of the recess for the TSV structure. Accordingly, the high-k dielectric layer described herein reduces the likelihood of (and/or the magnitude of) current leakage in semiconductor devices that are included in the device region of the first semiconductor die.Type: ApplicationFiled: January 6, 2023Publication date: March 28, 2024Inventors: Tsung-Hao YEH, Chien Hung LIU, Hsien Jung CHEN, Hsin Heng WANG, Kuo-Ching HUANG
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Patent number: 11935795Abstract: Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.Type: GrantFiled: July 28, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Hung Wang, Tsung-Lin Lee, Wen-Chih Chiang, Kuan-Jung Chen
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Publication number: 20240071982Abstract: In an embodiment, a device bonding apparatus is provided. The device bonding apparatus includes a first process station configured to receive a wafer; a first bond head configured to carry a die to the wafer, wherein the first bonding head includes a first rigid body and a vacuum channel in the first rigid body for providing an attaching force for carrying the die to the wafer; and a second bond head configured to press the die against the wafer, the second bond head including a second rigid body and an elastic head disposed over the second rigid body for pressing the die, the elastic head having a center portion and an edge portion surrounding the center portion, the center portion of the elastic head having a first thickness, the edge portion of the elastic head having a second thickness, the second thickness being greater than the second thickness.Type: ApplicationFiled: August 25, 2022Publication date: February 29, 2024Inventors: Yi-Jung Chen, Tsung-Fu Tsai, Szu-Wei Lu
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Patent number: 11521005Abstract: The present invention relates to a container, a package, a production system, and a distribution system. The container comprises a first identification and a second identification. The first identification is unique for identifying the container and is not exposed. The second identification is unique for identifying the container and is accessible. The second identification is different from the first identification. The second identification is associated with the first identification. The distribution system comprises a processor and a memory. The memory includes instructions causing the processor to perform operations.Type: GrantFiled: December 2, 2020Date of Patent: December 6, 2022Assignee: TCI CO., LTD.Inventors: Yung-Hsiang Lin, Min Yue, Hsing-I Wang, Tsung Jung Chen
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Publication number: 20210224498Abstract: The present invention relates to a container, a package, a production system, and a distribution system. The container comprises a first identification and a second identification. The first identification is unique for identifying the container and is not exposed. The second identification is unique for identifying the container and is accessible. The second identification is different from the first identification. The second identification is associated with the first identification. The distribution system comprises a processor and a memory. The memory includes instructions causing the processor to perform operations.Type: ApplicationFiled: December 2, 2020Publication date: July 22, 2021Applicant: TCI CO., LTD.Inventors: YUNG-HSIANG LIN, Min YUE, Hsing-I WANG, Tsung Jung CHEN
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Patent number: 9653047Abstract: A finger-pressed auxiliary device for a stringed instrument is provided. The stringed instrument comprises a body, a neck connected to the body, a fingerboard disposed on the neck, a plurality of frets disposed on the fingerboard at spaced intervals, and a plurality of strings extending along the length direction of the neck. The finger-pressed auxiliary device comprises: a plurality of finger-pressed plates extending along the length direction of the strings and each being disposed to correspond to a respective string; an upper support secured to the top of the neck; and a lower support secured to the bottom of the neck or the body. As the fingers only have to contact the surfaces of the finger-pressed plates, the pain associated with holding strings with fingertips is avoided.Type: GrantFiled: September 28, 2015Date of Patent: May 16, 2017Inventor: Tsung-Jung Chen
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Publication number: 20170092239Abstract: A finger-pressed auxiliary device for a stringed instrument is provided. The stringed instrument comprises a body, a neck connected to the body, a fingerboard disposed on the neck, a plurality of frets disposed on the fingerboard at spaced intervals, and a plurality of strings extending along the length direction of the neck. The finger-pressed auxiliary device comprises: a plurality of finger-pressed plates extending along the length direction of the strings and each being disposed to correspond to a respective string; an upper support secured to the top of the neck; and a lower support secured to the bottom of the neck or the body. As the fingers only have to contact the surfaces of the finger-pressed plates, the pain associated with holding strings with fingertips is avoided.Type: ApplicationFiled: September 28, 2015Publication date: March 30, 2017Inventor: Tsung-Jung CHEN
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Patent number: 9486984Abstract: Provided is a steel sheet including an iron-based material, a first coating layer disposed on the iron-based material, and a second coating layer disposed on the first coating layer, wherein the first coating layer includes a zinc alloy and the second coating layer consists essentially of chromium and carbon.Type: GrantFiled: May 5, 2015Date of Patent: November 8, 2016Assignees: National Taiwan University, CHINA STEEL CORPORATIONInventors: Chao-Sung Lin, Tsung-Jung Chen, Chun-Hung Wu
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Publication number: 20150314569Abstract: Provided is a steel sheet including an. iron-based material, a first coating layer disposed on the iron-based material, and a second coating layer disposed on the first coating layer, wherein the first coating layer includes a zinc alloy and the second coating layer consists essentially of chromium and carbon.Type: ApplicationFiled: May 5, 2015Publication date: November 5, 2015Inventors: Chao-Sung Lin, Tsung-Jung Chen, Chun-Hung Wu