Patents by Inventor Tsung-Lin Chen

Tsung-Lin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136222
    Abstract: Different isolation liners for different type FinFETs and associated isolation feature fabrication are disclosed herein. An exemplary method includes performing a fin etching process on a substrate to form first trenches defining first fins in a first region and second trenches defining second fins in a second region. An oxide liner is formed over the first fins in the first region and the second fins in the second region. A nitride liner is formed over the oxide liner in the first region and the second region. After removing the nitride liner from the first region, an isolation material is formed over the oxide liner and the nitride liner to fill the first trenches and the second trenches. The isolation material, the oxide liner, and the nitride liner are recessed to form first isolation features (isolation material and oxide liner) and second isolation features (isolation material, nitride liner, and oxide liner).
    Type: Application
    Filed: December 18, 2023
    Publication date: April 25, 2024
    Inventors: Tzung-Yi TSAI, Tsung-Lin LEE, Yen-Ming CHEN
  • Publication number: 20240136484
    Abstract: An electronic device includes a substrate, a semiconductor unit and an insulating layer. The semiconductor unit is disposed on the substrate. The insulating layer is disposed on the semiconductor unit, and the insulating layer includes a first portion and a second portion connected to the first portion. In a top view, the first portion partially overlaps the semiconductor unit, the second portion does not overlap the semiconductor unit, and a part of an edge of the insulating layer is irregular.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Publication number: 20240120451
    Abstract: An electronic assembly is provided. The electronic assembly includes a first circuit structure including a conductive structure, a second circuit structure disposed on the first circuit structure, a plurality of electronic elements disposed on the first circuit structure, and a connecting element disposed on the first circuit layer. The connecting element is disposed between two adjacent ones of the plurality electronic elements and electrically connected to the second circuit layer and one of the two adjacent ones of the plurality of electronic elements.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jia-Yuan CHEN, Tsung-Han TSAI, Kuan-Feng LEE, Yuan-Lin WU
  • Patent number: 11952656
    Abstract: A physical vapor deposition (PVD) system is disclosed. The PVD system includes a pedestal configured to hold a semiconductor wafer, a cover plate configured to hold a target, and a collimator between the pedestal and the cover plate. The collimator includes a plurality of passages configured to pass source material travelling from the cover plate toward the pedestal at an angle less than a threshold angle with respect to a line perpendicular to a surface of the pedestal facing the cover plate, where the collimator is configured to block source material travelling from the cover plate toward the pedestal at an angle greater than the threshold angle, where a first passage of the plurality of passages has a first passage length, where a second passage of the plurality of passages has a second passage length, and where the first passage length is less than the second passage length.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Chen, Tsung-Yi Chou, Wei-Der Sun, Hao-Wei Kang
  • Patent number: 11938509
    Abstract: A glue dispensing device comprises a base, a pressure control unit, a quantitative glue supply unit and a glue dispensing needle. The base comprises a pressure control chamber and a glue tube body, the pressure control chamber is located inside the base, the glue tube body extends from one end of the base to the other end, and the glue tube body penetrates the pressure control chamber. The pressure control unit is coupled to the pressure control chamber. The quantitative glue supply unit is disposed at one end of the base body and is coupled to the glue tube body. The glue dispensing needle is disposed at the other end of the base and is coupled to the glue tube body. The glue dispensing device uses the pressure change of the pressure control chamber to deform the glue tube body, thereby achieving quantitative glue dispensing effect with accuracy and stability. In addition, a glue dispensing method is also disclosed.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: March 26, 2024
    Assignee: Kulicke and Soffa Hi-Tech Co Ltd.
    Inventors: Lu-Min Chen, Tsung-Lin Tsai
  • Patent number: 11938508
    Abstract: A glue dispenser dispensing switch includes a switching device main body, a needle holding base, a wear-resistant plate, and a rotating device. The switching device main body is equipped with a double liquid inlet, the needle holding base is equipped with a mixed glue outlet, the wear-resistant plate is installed between the switching device main body and the needle holding base, and the wear-resistant plate is equipped with a wear-resistant plate opening. The rotating device is utilized to rotate the needle holding base or the wear-resistant plate. A mixed double-liquid glue passes through the double liquid inlet, the wear-resistant plate opening and the glue outlet to dispense a mixed glue while the double liquid inlet, the wear-resistant plate opening and the glue outlet are overlapped. In addition, a double liquid dispensing equipment is also disclosed herein.
    Type: Grant
    Filed: August 8, 2021
    Date of Patent: March 26, 2024
    Assignee: Kulicke and Soffa Hi-Tech Co., Ltd.
    Inventors: Lu-Min Chen, Mu-Huang Liu, Tsung-Lin Tsai
  • Publication number: 20240097033
    Abstract: The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Jen LAI, Yen-Ming CHEN, Tsung-Lin LEE
  • Patent number: 11935795
    Abstract: Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hung Wang, Tsung-Lin Lee, Wen-Chih Chiang, Kuan-Jung Chen
  • Patent number: 11935769
    Abstract: The present disclosure provides a chemical supply system, including a chamber, a tubing extending into the chamber, an interlock apparatus, including a fixture for fastening the tubing, and means for determining whether the tubing is fastened by the fixture.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fang-Pin Chiang, Tsung-Lin Tsai, Chaoyen Huang, Yi Chuan Chen
  • Publication number: 20240071790
    Abstract: A multi-function device includes a machine base, a plurality of horizontal bars, at least one gantry, a plurality of processing units and at least one first conveying uni. The horizontal bars are disposed at the top of the machine base. The gantry is disposed on the machine base and disposed over the horizontal bars. The processing unit is disposed on the horizontal bars and the gantry. The first conveying unit is disposed on the machine base. Each processing unit is a processing device capable of being replaced according to actual requirements, such as a soldering flux device, a soldering device, a sucking device, a glue dipping device, a glue dispensing device, a detecting device, a cleaning device or other processing devices. The present invention can integrate different types of manufacturing devices into one device, and the quantities of the horizontal bars and the modules thereof are not limited.
    Type: Application
    Filed: September 26, 2022
    Publication date: February 29, 2024
    Inventors: Lu-Min Chen, Tsung-Lin Tsai
  • Patent number: 10930959
    Abstract: A fuel cell system includes a comparator, a signal tracking controller, a first load distribution controller, a first loop gain controller, a first adder, a first PWM controller, a first fuel cell and power converter, a second load distribution controller, a second loop gain controller, a second adder, a second PWM controller, and a second fuel cell and power converter. According to the proposed fuel cell parallel system, each fuel cell connected in parallel can have a different output voltage, but the voltage at the load side can be maintained. In addition, the power output ratio of each fuel cell can be controlled under the nominal load conditions and the load varied.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: February 23, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Tsung-Lin Chen, Chien-Chang Wu
  • Publication number: 20180351186
    Abstract: A fuel cell system includes a comparator, a signal tracking controller, a first load distribution controller, a first loop gain controller, a first adder, a first PWM controller, a first fuel cell and power converter, a second load distribution controller, a second loop gain controller, a second adder, a second PWM controller, and a second fuel cell and power converter. According to the fuel cell system, each fuel cell connected in parallel can have a different output voltage, and the output power of each fuel cell can be controlled, so that the voltage at the load side can be maintained and the power output ratio of each fuel cell can be controlled under the load varied.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Inventors: Tsung-Lin CHEN, Chien-Chang WU
  • Patent number: 9269970
    Abstract: The present invention provides a fuel cell system, and the fuel cell system comprises a fuel cell, an after burner, a heat exchanger and a reformer. The after burner connects with the fuel cell to receive rest-bar of the fuel cell and produce a gas with high temperature. The heat exchanger comprises a first heat exchanging unit and a second heat exchanging unit connected with the first heat exchanging unit, and the second heat exchanging unit connects with a fuel input pipe for receiving the fuel. The reformer connects with the after burner, the first heat exchanging unit and the second heat exchanging unit separately.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: February 23, 2016
    Assignee: National Chiao Tung University
    Inventors: Tsung-Lin Chen, Chien-Chang Wu
  • Publication number: 20140178781
    Abstract: The present invention provides a fuel cell system, and the fuel cell system comprises a fuel cell, an after burner, a heat exchanger and a reformer. The after burner connects with the fuel cell to receive rest-bar of the fuel cell and produce a gas with high temperature. The heat exchanger comprises a first heat exchanging unit and a second heat exchanging unit connected with the first heat exchanging unit, and the second heat exchanging unit connects with a fuel input pipe for receiving the fuel. The reformer connects with the after burner, the first heat exchanging unit and the second heat exchanging unit separately.
    Type: Application
    Filed: June 7, 2013
    Publication date: June 26, 2014
    Inventors: Tsung-Lin CHEN, Chien-Chang WU
  • Patent number: 8736349
    Abstract: The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: May 27, 2014
    Assignee: National Chiao Tung University
    Inventors: Tsung-Lin Chen, Edward Yi Chang, Wei-Hua Chieng, Stone Cheng, Shyr-Long Jeng, Shin-Wei Huang
  • Publication number: 20130300322
    Abstract: An embedded industrial controller with a bicycle frame shape is disclosed. The embedded industrial controller includes a casing with the bicycle frame shape having an upper tube, a lower tube, a front fork, a rear lower fork, a rear upper fork and a base tube, a motherboard, a battery module, a power electrical port and a plurality of input and output electrical ports. The embedded industrial controller with a bicycle frame shape of the present invention has significantly improved functions than the conventional industrial controller, and further meets the conventional requirements such as dust proof, vibration proof, and heat dissipation.
    Type: Application
    Filed: September 13, 2012
    Publication date: November 14, 2013
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yung-Sheng Tseng, Ching-Wei Shih, Shyr-Long Jeng, Edward-Yi Chang, Chia-Hua Chang, Bing-Shiang Yang, Stone Cheng, Wei-Hua Chieng, Tsung-Lin Chen
  • Patent number: 8581638
    Abstract: The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on/off without a floating voltage source or a negative voltage source.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: November 12, 2013
    Assignee: National Chiao Tung University
    Inventors: Tsung-Lin Chen, Edward Yi Chang, Wei-Hua Chieng, Stone Cheng, Shyr-Long Jeng, Che-Wei Chang
  • Publication number: 20130241601
    Abstract: The present invention provides a high-side driver circuit including a power transistor, the first transistor, the second transistor, the second capacitor, the second diode, a start-up circuit. The start-up circuit is coupled between a resistor and the second capacitor to complete a gate driving circuit. And, the aforementioned resistor can either be the gate resistance of the power transistor or an external resistor. The design of start-up circuit enables the functionality of the bootstrap capacitor of being charged to a designate voltage level. Thus, the depletion-mode transistor can be controlled to turn on/off without a floating voltage source or a negative voltage source.
    Type: Application
    Filed: August 28, 2012
    Publication date: September 19, 2013
    Inventors: Tsung-Lin CHEN, Edward Yi CHANG, Wei-Hua CHIENG, Stone CHENG, Shyr-Long JENG, Che-Wei CHANG
  • Publication number: 20130241603
    Abstract: The present invention provides a current limit circuit apparatus, coupled with the gate of a GaN transistor. The current limit circuit comprises a diode, a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor. The source and the drain of the first transistor couple with the diode. The source of the second transistor couples with the gate of the first transistor. The source of the first transistor couples with the first transistor. The source of the second transistor couples with the second resistor. The third resistor couples with the fourth resistor and the gate of the first transistor. The first transistor turned off and the gate current is limited. When the current of the gate of the GaN transistor exceeds the predetermined value, the breakdown voltage is increased by limiting the gate current.
    Type: Application
    Filed: August 28, 2012
    Publication date: September 19, 2013
    Inventors: Tsung-Lin CHEN, Edward Yi CHANG, Wei-Hua CHIENG, Stone CHENG, Shyr-Long JENG, Shin-Wei HUANG
  • Publication number: 20130161708
    Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate, a die and a medium. The substrate has an upper substrate surface. The substrate has a trench extended downward from the upper substrate surface. The trench has a side trench surface. The die is in the trench. The die has a lower die surface and a side die surface. The lower die surface is below the upper substrate surface. A part of the trench between the side trench surface and the side die surface is filled with the medium.
    Type: Application
    Filed: September 7, 2012
    Publication date: June 27, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Tsan Peng, Shih-Tung Cheng, Edward Yi Chang, Po-Chien Chou, Shyr-Long Jeng, Chia-Hua Chang, Tsung-Lin Chen, Jian-Feng Tsai