Patents by Inventor Tsung-Wei Huang

Tsung-Wei Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10507216
    Abstract: A method for olfactory improvement with saccharide. The saccharide is a chitin-based material, proteoglycan, glycosaminoglycan, amino monosaccharide, N-acylated amino monosaccharide or a combination thereof.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: December 17, 2019
    Inventor: Tsung-Wei Huang
  • Publication number: 20190246475
    Abstract: A light emitting device driver circuit includes: a power conversion circuit, an error amplifier circuit, a sample-and-hold circuit, a load current generation circuit and a feed-forward capacitor. When the light emitting device driver circuit is in a disable phase, the sample-and-hold circuit connects a feedback signal with a second reference voltage and the sample-and-hold circuit disconnects the feedback signal from a load node, whereby the feed-forward capacitor samples a sample voltage and holds it after the disable phase transits to an enable phase. In the enable phase, the sample-and-hold circuit disconnects the feedback signal from the second reference voltage and the sample-and-hold circuit connects the feedback signal with the load node, so that during a predetermined period following the transition, there is a sufficient difference between two input terminals of the error amplifier circuit so that the load current is raised to a desired current level within the predetermined period.
    Type: Application
    Filed: November 22, 2018
    Publication date: August 8, 2019
    Inventors: Huan-Chien Yang, Tsung-Wei Huang, Hui-Wen Cheng, Shui-Mu Lin
  • Patent number: 10356878
    Abstract: A light emitting device driver circuit includes: a power conversion circuit, an error amplifier circuit, a sample-and-hold circuit, a load current generation circuit and a feed-forward capacitor. When the light emitting device driver circuit is in a disable phase, the sample-and-hold circuit connects a feedback signal with a second reference voltage and the sample-and-hold circuit disconnects the feedback signal from a load node, whereby the feed-forward capacitor samples a sample voltage and holds it after the disable phase transits to an enable phase. In the enable phase, the sample-and-hold circuit disconnects the feedback signal from the second reference voltage and the sample-and-hold circuit connects the feedback signal with the load node, so that during a predetermined period following the transition, there is a sufficient difference between two input terminals of the error amplifier circuit so that the load current is raised to a desired current level within the predetermined period.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: July 16, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Huan-Chien Yang, Tsung-Wei Huang, Hui-Wen Cheng, Shui-Mu Lin
  • Patent number: 10325059
    Abstract: A method, system, and computer program product for performing incremental common path pessimism analysis in integrated circuit design includes performing common path pessimism removal (CPPR) analysis to provide timing credit for one or more paths that are subject to common path pessimism. The method also includes identifying one or more post-CPPR critical paths based on the CPPR analysis, setting flags for critical nodes of the one or more post-CPPR critical paths, performing a design fix to address the one or more post-CPPR critical paths, and applying a set of rules based on the design fix and the flags to identify seed points among the critical nodes of the one or more post-CPPR critical paths. Invalidating and re-performing the CPPR analysis is done only for paths associated with the seed points.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: June 18, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsung-Wei Huang, Kerim Kalafala, Vasant B. Rao, Debjit Sinha, Natesan Venkateswaran
  • Patent number: 10325949
    Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: June 18, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
  • Publication number: 20190099440
    Abstract: A method for olfactory improvement with saccharide. The saccharide is a chitin-based material, proteoglycan, glycosaminoglycan, amino monosaccharide, N-acylated amino monosaccharide or a combination thereof.
    Type: Application
    Filed: April 2, 2018
    Publication date: April 4, 2019
    Inventor: Tsung-Wei HUANG
  • Publication number: 20190035829
    Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.
    Type: Application
    Filed: August 6, 2018
    Publication date: January 31, 2019
    Inventors: Chao-Ching CHANG, Sheng-Chan LI, Cheng-Hsien CHOU, Tsung-Wei HUANG, Min-Hui LIN, Yi-Ming LIN
  • Patent number: 10181744
    Abstract: A capacitive power converter circuit converts a DC power from a bus node to a charging power for charging a battery in a charging mode, and converts a battery voltage to a supply voltage through the bus node in a supply mode. The capacitive power converter circuit includes a conversion switch circuit including plural conversion switches configured to be operably coupled to one or more conversion capacitors, and a conversion control circuit for controlling the plural conversion switches. In the charging mode, the plural conversion switches control the conversion capacitors such that the charging current is scaled-up, and in the supply mode, the plural conversion switches control the conversion capacitors such that the supply voltage is scaled-up.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: January 15, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventor: Tsung-Wei Huang
  • Patent number: 10177588
    Abstract: A charging circuit for providing a charging current to a battery includes a power delivery unit and a capacitive power conversion circuit. The power delivery unit converts an input power to a DC output voltage and current, and regulates the DC output current to a predetermined output current level. The capacitive power conversion circuit includes a conversion switch circuit including plural conversion switches coupled to one or more capacitors, and a conversion control circuit which operates the plural conversion switches in plural conversion periods to connect the one or more capacitors between a pair of nodes selected from plural voltage division nodes, the DC output voltage, and a ground node periodically, so that the level of the charging current is scaled-up of the predetermined output current level.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: January 8, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Tsung-Wei Huang, Shui-Mu Lin, Wei-Jen Huang, Hsien-Chih She, Teng-Cheng Chen
  • Patent number: 10177420
    Abstract: A charger circuit for providing a charging power to a battery includes a power delivery unit and a power conversion circuit. The power conversion circuit includes at least one conversion switch coupled to an inductor, a front stage switch conducting a DC power generated by the power delivery unit to generate a mid-stage power, and a direct charging switch. In a switching charging mode, the conversion switch converts the mid-stage power to the charging current onto a charging node. In a direct charging mode, the power delivery unit regulates the DC current, and the front stage switch and the direct charging switch conduct the DC current onto the charging node. The body diodes of the front stage switch and the direct charging switch are reversely coupled, and the body diodes of the front stage switch and the conversion switch are reversely coupled, for blocking the parasitic body current.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: January 8, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Tsung-Wei Huang, Yu-Huei Lee, Chun-Jen Shih, Ruei-Hong Peng
  • Patent number: 10177576
    Abstract: A charger circuit for providing a charging current and voltage to a battery includes a power delivery unit, a capacitive power conversion circuit and a reverse blocking switch circuit. The power delivery unit converts an input power to a DC voltage and current. The capacitive power conversion circuit includes a conversion switch circuit including plural conversion switches coupled with one or more conversion capacitors, and a conversion control circuit. The DC current is regulated to a predetermined DC current level, and the conversion control circuit controls the connections of the plural conversion capacitors such that the charging current is scaled-up of the predetermined DC current level substantially by a current scale-up factor. The reverse blocking switch circuit is coupled in series with the capacitive power conversion circuit. The body diode of the reverse blocking switch is reversely coupled to the body diode of the conversion switch.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: January 8, 2019
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Wei-Jen Huang, Shui-Mu Lin, Tsung-Wei Huang, Chih-Hua Hou
  • Patent number: 10043841
    Abstract: A method for forming an image sensor device is provided. The method includes providing a substrate having a front surface and a back surface. The method includes removing a first portion of the substrate to form a first trench. The method includes forming a first isolation structure in the first trench. The first isolation structure has a top surface. The method includes removing a second portion of the first isolation structure and a third portion of the substrate to form a second trench passing through the first isolation structure and extending into the substrate. The method includes forming a second isolation structure in the second trench. The method includes forming a light-sensing region in the substrate. The method includes removing a fourth portion of the substrate to expose a first bottom portion of the second isolation structure and a backside of the light-sensing region.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 7, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
  • Publication number: 20180115025
    Abstract: A charger circuit for providing a charging power to a battery includes a power delivery unit and a power conversion circuit. The power conversion circuit includes at least one conversion switch coupled to an inductor, a front stage switch conducting a DC power generated by the power delivery unit to generate a mid-stage power, and a direct charging switch. In a switching charging mode, the conversion switch converts the mid-stage power to the charging current onto a charging node. In a direct charging mode, the power delivery unit regulates the DC current, and the front stage switch and the direct charging switch conduct the DC current onto the charging node. The body diodes of the front stage switch and the direct charging switch are reversely coupled, and the body diodes of the front stage switch and the conversion switch are reversely coupled, for blocking the parasitic body current.
    Type: Application
    Filed: June 20, 2017
    Publication date: April 26, 2018
    Inventors: Tsung-Wei Huang, Yu-Huei Lee, Chun-Jen Shih, Ruei-Hong Peng
  • Publication number: 20180083456
    Abstract: A charging circuit for providing a charging current to a battery includes a power delivery unit and a capacitive power conversion circuit. The power delivery unit converts an input power to a DC output voltage and current, and regulates the DC output current to a predetermined output current level. The capacitive power conversion circuit includes a conversion switch circuit including plural conversion switches coupled to one or more capacitors, and a conversion control circuit which operates the plural conversion switches in plural conversion periods to connect the one or more capacitors between a pair of nodes selected from plural voltage division nodes, the DC output voltage, and a ground node periodically, so that the level of the charging current is scaled-up of the predetermined output current level.
    Type: Application
    Filed: May 18, 2017
    Publication date: March 22, 2018
    Inventors: Tsung-Wei Huang, Shui-Mu Lin, Wei-Jen Huang, Hsien-Chih She, Teng-Cheng Chen
  • Publication number: 20180083458
    Abstract: A charger circuit for providing a charging current and voltage to a battery includes a power delivery unit and a capacitive power conversion circuit. The power delivery unit converts an input power to a DC voltage and current. The capacitive power conversion circuit includes a conversion switch circuit including plural conversion switches and being coupled with one or plural conversion capacitors, a regulation switch, and a conversion control circuit. In a current scaled-up charging mode, the DC current is regulated, and the conversion control circuit controls the connection of the plural conversion capacitors such that the charging current is scaled-up of the DC current substantially by a predetermined current scale-up factor. In a constant voltage linear charging mode, the conversion control circuit linearly controls the regulation switch to regulate the level of the charging voltage to a predetermined constant voltage level.
    Type: Application
    Filed: June 30, 2017
    Publication date: March 22, 2018
    Inventors: Tsung-Wei Huang, Shun-Yu Huang
  • Publication number: 20180083457
    Abstract: A capacitive power converter circuit converts a DC power from a bus node to a charging power for charging a battery in a charging mode, and converts a battery voltage to a supply voltage through the bus node in a supply mode. The capacitive power converter circuit includes a conversion switch circuit including plural conversion switches configured to be operably coupled to one or more conversion capacitors, and a conversion control circuit for controlling the plural conversion switches. In the charging mode, the plural conversion switches control the conversion capacitors such that the charging current is scaled-up, and in the supply mode, the plural conversion switches control the conversion capacitors such that the supply voltage is scaled-up.
    Type: Application
    Filed: May 23, 2017
    Publication date: March 22, 2018
    Inventor: Tsung-Wei Huang
  • Publication number: 20180083459
    Abstract: A charger circuit for providing a charging current and voltage to a battery includes a power delivery unit, a capacitive power conversion circuit and a reverse blocking switch circuit. The power delivery unit converts an input power to a DC voltage and current. The capacitive power conversion circuit includes a conversion switch circuit including plural conversion switches coupled with one or more conversion capacitors, and a conversion control circuit. The DC current is regulated to a predetermined DC current level, and the conversion control circuit controls the connections of the plural conversion capacitors such that the charging current is scaled-up of the predetermined DC current level substantially by a current scale-up factor. The reverse blocking switch circuit is coupled in series with the capacitive power conversion circuit. The body diode of the reverse blocking switch is reversely coupled to the body diode of the conversion switch.
    Type: Application
    Filed: June 26, 2017
    Publication date: March 22, 2018
    Inventors: Wei-Jen Huang, Shui-Mu Lin, Tsung-Wei Huang, Chih-Hua Hou
  • Patent number: 9916405
    Abstract: A method, system, and computer program product perform distributed timing analysis of an integrated circuit design. Aspects include dividing the integrated circuit design into non-overlapping design partitions, each design partition including nodes and edges, each edge interconnecting a pair of the nodes. Aspects also include identifying speculative nodes among the nodes, each speculative node having at least one and less than all timing inputs available and being associated with a speculative processing task, and identifying non-speculative nodes among the nodes, each non-speculative node having all timing inputs available and being associated with a non-speculative processing task. Assigning each of the non-speculative processing tasks to a respective processor of a processing system specific to each design partition for timing analysis processing is done prior to assigning any of the speculative processing tasks.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsung-Wei Huang, Kerim Kalafala, Debjit Sinha, Natesan Venkateswaran
  • Publication number: 20180046748
    Abstract: A method, system, and computer program product for performing incremental common path pessimism analysis in integrated circuit design includes performing common path pessimism removal (CPPR) analysis to provide timing credit for one or more paths that are subject to common path pessimism. The method also includes identifying one or more post-CPPR critical paths based on the CPPR analysis, setting flags for critical nodes of the one or more post-CPPR critical paths, performing a design fix to address the one or more post-CPPR critical paths, and applying a set of rules based on the design fix and the flags to identify seed points among the critical nodes of the one or more post-CPPR critical paths. Invalidating and re-performing the CPPR analysis is done only for paths associated with the seed points.
    Type: Application
    Filed: October 27, 2017
    Publication date: February 15, 2018
    Inventors: Tsung-Wei Huang, Kerim Kalafala, Vasant B. Rao, Debjit Sinha, Natesan Venkateswaran
  • Patent number: 9836572
    Abstract: A method, system, and computer program product for performing incremental common path pessimism analysis in integrated circuit design includes performing common path pessimism removal (CPPR) analysis to provide timing credit for one or more paths that are subject to common path pessimism. The method also includes identifying one or more post-CPPR critical paths based on the CPPR analysis, setting flags for critical nodes of the one or more post-CPPR critical paths, performing a design fix to address the one or more post-CPPR critical paths, and applying a set of rules based on the design fix and the flags to identify seed points among the critical nodes of the one or more post-CPPR critical paths. Invalidating and re-performing the CPPR analysis is done only for paths associated with the seed points.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: December 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tsung-Wei Huang, Kerim Kalafala, Vasant B. Rao, Debjit Sinha, Natesan Venkateswaran