Patents by Inventor Tsung-Yi Hsu

Tsung-Yi Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180196623
    Abstract: A print output management system includes a management server, an output server and a large format equipment. The management server receives an original document file and converts the original document file to an output processing file, generates an authentication code corresponding to the output processing file, and stores the output processing file and the authentication code. The output server, connected with the management server, receives an access command which includes the authentication code, transmits the authentication code to the management server, accesses the output processing file corresponding to the authentication code from the management server, and outputs a print message corresponding to the output processing file. The large format output equipment, connected with the output server, includes a roll and a roll paper installed on the roll. The large format output equipment receives the print message, and prints the output processing file on the roll paper in accordance with the print message.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 12, 2018
    Inventor: TSUNG YI HSU
  • Publication number: 20140217410
    Abstract: The present invention provides a manufacturing method of array substrate, which comprises: substrate; source, drain, driving electrode, and first capacitance electrode being formed on substrate; a first dielectric layer being formed to cover source, drain, driving electrode, and first capacitance electrode; first dielectric layer comprising first section covering first capacitance and second section covering the driving electrode; second section being thicker than first section; second capacitance electrode being formed on the first section of the first dielectric layer; first capacitor being formed with second capacitance electrode, first capacitance electrode, and first dielectric layer in between. Through this invention, the glue sealing of display device with present invention of array substrate is more effective.
    Type: Application
    Filed: February 19, 2013
    Publication date: August 7, 2014
    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Tsung-Yi Hsu
  • Patent number: 8330163
    Abstract: An active device array mother substrate including a substrate, pixel arrays, and a polymer-stabilized alignment curing circuit is provided. The substrate has panel regions, a circuit region, a first cutting line, and a second cutting line. The first cutting line is disposed on the circuit region between an edge of the substrate and the second cutting line. The active devices of the pixel arrays have a semiconductor layer. The polymer-stabilized alignment curing circuit disposed on the circuit region includes curing pads disposed between the edge of the substrate and the first cutting line and curing lines having an upper conductive layer connected to the corresponding curing pads and the corresponding pixel array. The upper conductive layer is in the same layer as the source/drain conductor. Therefore, the curing lines are capable of preventing problems such as peeling, so as to keep the polymer-stabilized alignment curing circuit operating normally.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: December 11, 2012
    Assignee: Au Optronics Corporation
    Inventors: Yu-Mou Chen, Wen-Bin Hsu, Chih-Yao Chao, Tsung-Yi Hsu
  • Publication number: 20120126235
    Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.
    Type: Application
    Filed: February 3, 2012
    Publication date: May 24, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ching-Chieh Shih, Yeong-Shyang Lee, Tsung-Yi Hsu, Feng-Yuan Gan
  • Patent number: 8133773
    Abstract: In one aspect of the invention, the method of forming a TFT array panel includes forming a patterned first conductive layer on a substrate, forming a gate insulating layer on the patterned first conductive layer and the substrate, forming a patterned semiconductor layer on the gate insulating layer, forming a patterned second conductive layer, forming a patterned passivation layer on the patterned second conductive layer and the substrate, and forming a patterned transparent conductive layer on the patterned passivation layer.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: March 13, 2012
    Assignee: AU Optronics Corporation
    Inventors: Ching-Chieh Shih, Yeong-Shyang Lee, Tsung-Yi Hsu, Feng-Yuan Gan
  • Publication number: 20110049521
    Abstract: An active device array mother substrate including a substrate, pixel arrays, and a polymer-stabilized alignment curing circuit is provided. The substrate has panel regions, a circuit region, a first cutting line, and a second cutting line. The first cutting line is disposed on the circuit region between an edge of the substrate and the second cutting line. The active devices of the pixel arrays have a semiconductor layer. The polymer-stabilized alignment curing circuit disposed on the circuit region includes curing pads disposed between the edge of the substrate and the first cutting line and curing lines having an upper conductive layer connected to the corresponding curing pads and the corresponding pixel array. The upper conductive layer is in the same layer as the source/drain conductor. Therefore, the curing lines are capable of preventing problems such as peeling, so as to keep the polymer-stabilized alignment curing circuit operating normally.
    Type: Application
    Filed: December 10, 2009
    Publication date: March 3, 2011
    Applicant: Au Optronics Corporation
    Inventors: Yu-Mou Chen, Wen-Bin Hsu, Chih-Yao Chao, Tsung-Yi Hsu
  • Patent number: 7683309
    Abstract: A photosensor includes a metal conductive layer, an interface dielectric layer, a silicon-rich dielectric layer and a transparent conductive layer. The interface dielectric layer is formed on the metal conductive layer. The silicon-rich dielectric layer is formed on the interface dielectric layer. The transparent conductive layer is formed on the silicon-rich dielectric layer. A method for fabricating a photosensor is also disclosed herein.
    Type: Grant
    Filed: January 2, 2009
    Date of Patent: March 23, 2010
    Assignee: AU Optronics Corporation
    Inventors: Shin-Shueh Chen, Wan-Yi Liu, Chia-Tien Peng, Tsung-Yi Hsu, Jen-Pei Tseng
  • Patent number: 7608529
    Abstract: A display panel comprises a substrate having a displaying region (such as active organic light emitting region) and a circuit driving region; and a polysilicon layer formed on the substrate and having a first polysilicon portion and a second polysilicon portion respectively corresponding to the displaying region and circuit driving region, wherein the grain size of the second polysilicon portion crystallized by continuous wave (CW) laser annealing method is larger than that of the first polysilicon portion crystallized by excimer laser annealing (ELA) method.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 27, 2009
    Assignee: AU Optronics Corp.
    Inventors: Tsung-Yi Hsu, Chih-Hsiung Chang
  • Publication number: 20090101913
    Abstract: A method of forming a thin film transistor (TFT) array panel, comprising the steps of: (i) forming a patterned first conductive layer, which includes a gate line and a shielding portion, on a substrate, (ii) forming a gate insulating layer on the patterned first conductive layer and the substrate, (iii) forming a patterned semiconductor layer on the gate insulating layer, (iv) forming a patterned second conductive layer, which includes a source electrode, and a drain electrode on the patterned semiconductor layer, and a data line that is electrically connected to the source electrode, (v) forming a patterned passivation layer on the patterned second conductive layer and the substrate, and (vi) forming a patterned transparent conductive layer on the patterned passivation layer.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 23, 2009
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ching-Chieh Shih, Yeong-Shyang Lee, Tsung-Yi Hsu, Feng-Yuan Gan
  • Publication number: 20080090340
    Abstract: A display panel comprises a substrate having a displaying region (such as active organic light emitting region) and a circuit driving region; and a polysilicon layer formed on the substrate and having a first polysilicon portion and a second polysilicon portion respectively corresponding to the displaying region and circuit driving region, wherein the grain size of the second polysilicon portion crystallized by continuous wave (CW) laser annealing method is larger than that of the first polysilicon portion crystallized by excimer laser annealing (ELA) method.
    Type: Application
    Filed: November 30, 2007
    Publication date: April 17, 2008
    Applicant: AU OPTRONICS CORP.
    Inventors: Tsung-Yi Hsu, Chih-Hsiung Chang
  • Patent number: 7303981
    Abstract: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous silicon region. The amorphous silicon structure is crystallized to form the polysilicon structure with a first polysilicon region and a second polysilicon region corresponding to the first amorphous silicon region and the second amorphous silicon region.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: December 4, 2007
    Assignee: AU Optronics Corp.
    Inventors: Chien-Chou Hsu, Tsung-Yi Hsu
  • Publication number: 20070176180
    Abstract: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous silicon region. The amorphous silicon structure is crystallized to form the polysilicon structure with a first polysilicon region and a second polysilicon region corresponding to the first amorphous silicon region and the second amorphous silicon region.
    Type: Application
    Filed: March 22, 2007
    Publication date: August 2, 2007
    Applicant: AU OPTRONICS CORP.
    Inventors: Chien-Chou Hsu, Tsung-Yi Hsu
  • Publication number: 20070166898
    Abstract: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous silicon region. The amorphous silicon structure is crystallized to form the polysilicon structure with a first polysilicon region and a second polysilicon region corresponding to the first amorphous silicon region and the second amorphous silicon region.
    Type: Application
    Filed: March 22, 2007
    Publication date: July 19, 2007
    Applicant: AU OPTRONICS CORP.
    Inventors: Chien-Chou Hsu, Tsung-Yi Hsu
  • Patent number: 7081400
    Abstract: A method for manufacturing polysilicon layer is provided. At first, a substrate is provided. An amorphous silicon layer having a second region and a first region is formed on the substrate. The first region is thicker than the second region. The amorphous silicon layer is completely melted to form a melted amorphous silicon layer having a first melted region and a second melted region. The temperature of the bottom center of the first melted region is lower than that of the second melted region and that of the top of the first melted region. The melted amorphous silicon layer is crystallized to form a polysilicon layer. The crystallization begins from the bottom center of the first melted region to the second melted region and the top of the first melted region.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: July 25, 2006
    Assignee: Au Optronics Corp.
    Inventors: Yi-Wei Chen, Chih-Hsiung Chang, Tsung-Yi Hsu
  • Publication number: 20060128045
    Abstract: A display panel comprises a substrate having a displaying region (such as active organic light emitting region) and a circuit driving region; and a polysilicon layer formed on the substrate and having a first polysilicon portion and a second polysilicon portion respectively corresponding to the displaying region and circuit driving region, wherein the grain size of the second polysilicon portion crystallized by continuous wave (CW) laser annealing method is larger than that of the first polysilicon portion crystallized by excimer laser annealing (ELA) method.
    Type: Application
    Filed: October 27, 2005
    Publication date: June 15, 2006
    Applicant: AU OPTRONICS CORP.
    Inventors: Tsung-Yi Hsu, Chih-Hsiung Chang
  • Publication number: 20060009013
    Abstract: A method for manufacturing polysilicon layer is provided. At first, a substrate is provided. An amorphous silicon layer having a second region and a first region is formed on the substrate. The first region is thicker than the second region. The amorphous silicon layer is completely melted to form a melted amorphous silicon layer having a first melted region and a second melted region. The temperature of the bottom center of the first melted region is lower than that of the second melted region and that of the top of the first melted region. The melted amorphous silicon layer is crystallized to form a polysilicon layer. The crystallization begins from the bottom center of the first melted region to the second melted region and the top of the first melted region.
    Type: Application
    Filed: January 26, 2005
    Publication date: January 12, 2006
    Inventors: Yi-Wei Chen, Chih-Hsiung Chang, Tsung-Yi Hsu
  • Publication number: 20060006390
    Abstract: A method for forming a polysilicon structure is provided. An amorphous silicon structure with a first amorphous silicon region and a second amorphous silicon region is formed in a first region and a second region of a substrate, respectively. The first amorphous silicon region is thinner than the second amorphous silicon region. The amorphous silicon structure is crystallized to form the polysilicon structure with a first polysilicon region and a second polysilicon region corresponding to the first amorphous silicon region and the second amorphous silicon region.
    Type: Application
    Filed: November 30, 2004
    Publication date: January 12, 2006
    Inventors: Chien-Chou Hsu, Tsung-Yi Hsu