Abstract: An electronic device is provided, including a first body, a second body, an axle assembly, a supporting frame, a display panel, a lens unit and a reflective unit. The second body is connected to the first body. The axle assembly is disposed between the first body and the second body, and via which first body is rotatable relative to the second body. The supporting frame is disposed in the second body and connected to the axle assembly, wherein the supporting frame is rotated with the rotation of the axle assembly. The display panel is fastened in the supporting frame. The lens unit is disposed on an end of the supporting frame. The reflective unit is disposed on the supporting frame and adjacent to the display panel.

Abstract: A power distribution system is disclosed. The system includes a first power line and a second power line laid out on a substrate. The first power line is spaced apart from the second power line. The system also includes at least one conductive connecting line that electrically couples the first power line at one end and the second power line at another end. A power supply supplies power to the first power line and the second power line. A supply node on the conductive connecting line is then used to provide the supplied power.

Abstract: A layout of a voltage/current reference system is disclosed. A first voltage/current reference circuit (for example, a bandgap reference circuit) and a second voltage/current reference circuit are respectively laid out on either side of a substrate, such as edges or perimeter sides of the substrate. A reference voltage/current is derived by averaging respective output reference voltage/current values of the first and the second voltage/current reference circuits. Accordingly, the noise influence on the voltage/current reference system is minimized.

Abstract: The present invention discloses a source driver powered by a power supply comprising at least one channel, at least one output pad coupled to the channel, at least one switch connected between the output pad and a predetermined voltage, and a power down detector for detecting whether a first supply voltage from the power supply is insufficient and generating a reset signal to turn on the switch when the first supply voltage from the power supply is insufficient.

Abstract: A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.

Abstract: An output buffer circuit with enhanced slew rate is disclosed. A first and a second slew-rate enhancing transistor are configured to enhance the slew rate of the source transistor and the sink transistor of an output stage. A first control circuit and a second control circuit turn off the first and the second slew-rate enhancing transistors during the static state, and turn on the first and the second slew-rate enhancing transistors during the transition.

Abstract: The invention relates to a signal driving system for a display. The signal driving system comprises: a signal controller, a flexible connector and a plurality of driving devices. The signal controller is used to produce a first control signal. The flexible connector is connected to the signal controller, and used to receive the first control signal. One of the driving devices is connected to the flexible connector. The driving devices connect in cascade. Each driving device comprises a data input port, a data output port and a driving signal output port. The data input port receives the first control signal or a second control signal. The data output port outputs the second control signal. According to the first control signal or the second control signal, the driving signal output port transmits a driving signal. The signal driving system of the invention can make the data output port of the driving device transmit the second control signal to the next driving device.

Abstract: The present invention discloses a source driver powered by a power supply comprising at least one channel, at least one output pad coupled to the channel, at least one switch connected between the output pad and a predetermined voltage, and a power down detector for detecting whether a first supply voltage from the power supply is insufficient and generating a reset signal to turn on the switch if yes.

Abstract: The present invention discloses a source driver and a method for restraining noise output by a source driver during power on/off of a power supply. The source driver includes a data bus, a plurality of channels, a multiplexer and a plurality of output pads. The channels are connected to the output pads via the multiplexer. Each channel has a latch unit. Data is transmitted on the data bus and stored in the latch units. The source driver is powered by a first supply voltage from the power supply. The method comprises determining whether the first supply voltage is insufficient, and if yes, performing the following steps. First, set the data transmitted on the data bus to be a predetermined value. Then, keep the latch units turned on, thereby the data is sent out from the latch units. Then, keep the multiplexer turned on for outputting a driving voltage based on the data via the output pads.

Abstract: The present invention discloses a source driver and a method for restraining noise output by a source driver during power on/off of a power supply. The source driver includes a multiplexer, at least two channels and at least two output pads. The channels are connected to the output pads via the multiplexer. The source driver is powered by a first supply voltage from the power supply. The two output pads are connected via a charge sharing switch. The method comprises the following steps. First, determine whether the first supply voltage is insufficient, and if yes, perform the following steps. Turn off the charge sharing switch. Then, disconnect the channels from the output pads by the multiplexer.

Abstract: The present invention discloses a signal interface to transmit a data signal to a driving circuit. The signal interface comprises a first circuit, a second circuit and a data bus. The first circuit comprises a first register. The second circuit comprises a selector, a second register, a receiver and a third register. If the data signal is a single-end signal, the first register and the selector receive the data signal. Then, the selector transmits the data signal to the second register. The data bus transmits the signal saved in the first register and the second register to the driving circuit. If the data signal is a serial signal, the selector receives and transmits the data signal to the receiver to have it transferred to a single-end signal. Then, the signal is transmitted to the third register and output via the data bus.

Abstract: A circuit for resetting a display having at least one driver outputting a driving voltage through an output channel to a corresponding data line of a panel comprises a first switch and a second switch. The first switch is actuated by a control pulse to transfer a reset voltage to the data line of the panel. The second switch is actuated by the control pulse to electrically isolate the output channel of the driver from the data line of the panel, wherein the control pulse is asserted during transient periods resulting from power-on and power-off of the display.

Abstract: A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.

Abstract: A wire-on-array (WOA) flat panel display is provided. The wire-on-array (WOA) flat panel display is characterized in a plurality of high input impedance components between the flexible printed circuit (FPC) board and the corresponding source driver circuits. Each of the high input impedance components is able to receive gamma voltages with little input current and then transmit the gamma voltages to each of the source driver circuit for production of source voltages of little banding effect.

Abstract: A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.

Abstract: A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.

Abstract: A DAC has an N-bit R-string DAC section and an (M-N)-bit interpolation DAC section. The N-bit R-string DAC section has a plurality of resistors and a 2-of-N selector. The resistors are electrically connected in series to provide a plurality of voltage levels. The 2-of-N selector is coupled to the series-connected resistors, and is arranged to select two neighboring voltage levels according to an N-bit MSB subword. The (M-N)-bit interpolation DAC section is coupled to the N-bit R-string DAC section, and is arranged to interpolate an analog output signal from the two neighboring voltage levels according to an (M-N)-bit LSB subword.

Abstract: The present invention discloses a signal interface to transmit a data signal to a driving circuit. The signal interface comprises a first circuit, a second circuit and a data bus. The first circuit comprises a first register. The second circuit comprises a selector, a second register, a receiver and a third register. If the data signal is a single-end signal, the first register and the selector receive the data signal. Then, the selector transmits the data signal to the second register. The data bus transmits the signal saved in the first register and the second register to the driving circuit. If the data signal is a serial signal, the selector receives and transmits the data signal to the receiver to have it transferred to a single-end signal. Then, the signal is transmitted to the third register and output via the data bus.

Abstract: A method for driving an LCD monitor is disclosed. The LCD monitor includes a voltage selection unit used for outputting a plurality of driving voltages according to display data, and a plurality of output buffers each electrically connected to the voltage selection circuit and a corresponding pixel. In the beginning, an output port of each output buffer approaches voltage at an input port. Then, the output ports of the driving units, which approach the same input voltage, are electrically connected to have an average voltage. In addition, the LCD monitor further includes a timing controller for controlling operation of the output buffers. When output ports of the output buffers, which approach the same input voltage, are electrically connected, the output buffers are turned off for saving power.

Abstract: The invention relates to a cascade system capable of restraining duty cycle offsets. The cascade system receives an input signal with an input duty cycle. The cascade system comprises a plurality of circuit units. The circuit units are connected in series. Each circuit unit receives a signal from a previous circuit unit. Through at least one circuit unit, a duty cycle offset exists between the processing duty cycle and the input duty cycle.