Patents by Inventor Tsutomu Aono
Tsutomu Aono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6906410Abstract: A semiconductor device includes a power supply semiconductor chip that has a plurality of current passing electrodes and a plurality of control electrodes. Conductive plates are disposed on the current electrodes and the control electrodes, and extend to regions for external connections. The conductive plates also includes connecting regions that are suspended between the chip and the external connection regions and suppers vibration propagating to the chip. One conductive plate unit for the current passing electrodes and another conductive plate unit for the control electrodes are separately soldered on the corresponding electrodes. Alternatively, only one unit may be soldered on the semiconductor chip, and portions of the unit may be removed to fabricate the device. Because of the absence of wire-bonding steps, the semiconductor chip does not receive impact of wire-bonding during the manufacturing process.Type: GrantFiled: February 27, 2003Date of Patent: June 14, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Patent number: 6894371Abstract: In a case of a semiconductor chip having an electrode pad to be wire-bonded to a header, securing of a fixing region is difficult since the spread of an Ag paste cannot be controlled, therefore, there has existed a problem such that stable manufacturing could not be carried out. Also, there existed a problem such that realization of stable manufacturing resulted in an excessively large external package form. A projection part is provided in a header, and a fixing region of a bonding wire is secured by arranging a chip at a position shifted in a direction to become distant from the projection part. An electrode pad to be connected to the header is arranged closer to the chip center than the other electrode pads of the identical chip side, and a wire is extended therefrom to the projection part or in the vicinity thereof so as to cross the chip and is fixed. Thereby, downsizing of the package and stable manufacturing are realized.Type: GrantFiled: February 6, 2003Date of Patent: May 17, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Koichi Hirata, Osamu Isaki, Tsutomu Aono, Toshikazu Hirai, Tetsuro Asano
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Patent number: 6841421Abstract: A semiconductor device includes a power supply semiconductor chip that has a plurality of current passing electrodes. Conductive plates are disposed on the current electrodes, and conductive wires used for an external connection of the device are fixed on the conductive plates, but not directly on the current passing electrode. A large plate is first fixed on the semiconductor chip, and then the back surface of the large plate is removed to form the individual conductive plates. Because the conductive wires are soldered onto the conductive plates, the semiconductor chip does not receive impact of wire bonding. Even when the conductive wires are wire bonded to the conductive plates, the plates may serve as shock absorbers during wire bonding procedure to reduce the impact of the wire bonding.Type: GrantFiled: February 27, 2003Date of Patent: January 11, 2005Assignee: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Patent number: 6822338Abstract: A semiconductor device includes a power supply semiconductor chip that has a current passing electrode. A conductive plate is disposed on the current electrode, and a conductive wire that is used for an external connection of the device is fixed on the conductive plate, but not directly on the current passing electrode. The conductive plate may serve as a shock absorber during wire bonding procedure, and may contact more than one current passing electrodes so that the number of wire bonding procedures is reduced in manufacturing the device.Type: GrantFiled: February 27, 2003Date of Patent: November 23, 2004Assignee: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Publication number: 20040214419Abstract: A semiconductor device includes a power supply semiconductor chip that has a plurality of current passing electrodes and a plurality of control electrodes. Conductive plates are disposed on the current electrodes and the control electrodes, and extend to regions for external connections. The conductive plates also includes connecting regions that are suspended between the chip and the external connection regions and suppers vibration propagating to the chip. One conductive plate unit for the current passing electrodes and another conductive plate unit for the control electrodes are separately soldered on the corresponding electrodes. Alternatively, only one unit may be soldered on the semiconductor chip, and portions of the unit may be removed to fabricate the device. Because of the absence of wire-bonding steps, the semiconductor chip does not receive impact of wire-bonding during the manufacturing process.Type: ApplicationFiled: February 27, 2003Publication date: October 28, 2004Applicant: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Publication number: 20030164536Abstract: In a case of a semiconductor chip having an electrode pad to be wire-bonded to a header, securing of a fixing region is difficult since the spread of an Ag paste cannot be controlled, therefore, there has existed a problem such that stable manufacturing could not be carried out. Also, there existed a problem such that realization of stable manufacturing resulted in an excessively large external package form. A projection part is provided in a header, and a fixing region of a bonding wire is secured by arranging a chip at a position shifted in a direction to become distant from the projection part. An electrode pad to be connected to the header is arranged closer to the chip center than the other electrode pads of the identical chip side, and a wire is extended therefrom to the projection part or in the vicinity thereof so as to cross the chip and is fixed. Thereby, downsizing of the package and stable manufacturing are realized.Type: ApplicationFiled: February 6, 2003Publication date: September 4, 2003Inventors: Koichi Hirata, Osamu Isaki, Tsutomu Aono, Toshikazu Hirai, Tetsuro Asano
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Publication number: 20030162382Abstract: A semiconductor device includes a power supply semiconductor chip that has a current passing electrode. A conductive plate is disposed on the current electrode, and a conductive wire that is used for an external connection of the device is fixed on the conductive plate, but not directly on the current passing electrode. The conductive plate may serve as a shock absorber during wire bonding procedure, and may contact more than one current passing electrodes so that the number of wire bonding procedures is reduced in manufacturing the device.Type: ApplicationFiled: February 27, 2003Publication date: August 28, 2003Applicant: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Publication number: 20030162330Abstract: A semiconductor device includes a power supply semiconductor chip that has a plurality of current passing electrodes. Conductive plates are disposed on the current electrodes, and conductive wires used for an external connection of the device are fixed on the conductive plates, but not directly on the current passing electrode. A large plate is first fixed on the semiconductor chip, and then the back surface of the large plate is removed to form the individual conductive plates. Because the conductive wires are soldered onto the conductive plates, the semiconductor chip does not receive impact of wire bonding. Even when the conductive wires are wire bonded to the conductive plates, the plates may serve as shock absorbers during wire bonding procedure to reduce the impact of the wire bonding.Type: ApplicationFiled: February 27, 2003Publication date: August 28, 2003Applicant: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Kikuo Okada
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Patent number: 5521429Abstract: A surface mount flat package for a semiconductor device includes a number of leads on a lead frame. At least one of the leads is straight with a thick section and a thin section. Part of the thin section is inside a protective medium and part extends outside. A bottom surface of the part extending outside the protective medium serves as a connection terminal for the semiconductor device. Another lead is an island lead that has a bonding island on an upper surface thereof. The island lead has a thick section and a thin section. The bonding island is on the thin section. The thin section is entirely within the protective medium. A bottom surface of the thick section is exposed outside the protective medium to serve as a connection terminal. The bottom surfaces of the thick sections are coplanar with each other and preferably coplanar with a bottom surface of the package.Type: GrantFiled: November 23, 1994Date of Patent: May 28, 1996Assignee: Sanyo Electric Co., Ltd.Inventors: Tsutomu Aono, Takayoshi Nishi