Patents by Inventor Tsutomu Matsushita

Tsutomu Matsushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147617
    Abstract: A wiring body disposed above a substrate including a conductor including: a via electrode provided in a via hole formed in an insulating layer above the substrate and connected to the conductor through the via hole; and wiring provided above the substrate with the insulating layer interposed therebetween. A lower layer included in the via electrode and located above the insulating layer and a lower layer included in the wiring include the same material.
    Type: Application
    Filed: March 16, 2022
    Publication date: May 2, 2024
    Inventors: Takayoshi NIRENGI, Akihiro OISHI, Tsutomu AISAKA, Daisuke MATSUSHITA, Jumpei IWANAGA, Tadashi TOJO
  • Publication number: 20240145374
    Abstract: A wiring body disposed above a substrate including a conductor includes: a via electrode provided in a via hole formed in an insulating layer above the substrate and connected to the conductor through the via hole; and wiring provided above the substrate with the insulating layer interposed therebetween. The via electrode includes: a seed layer formed along an inner surface of the insulating layer from above the conductor in the via hole; a via electrode body layer formed to be located above the seed layer and fill the via hole; and an adhesion layer formed between the seed layer and the inner surface of the insulating layer in the via hole.
    Type: Application
    Filed: March 16, 2022
    Publication date: May 2, 2024
    Inventors: Takayoshi NIRENGI, Akihiro OISHI, Tsutomu AISAKA, Daisuke MATSUSHITA, Jumpei IWANAGA, Tadashi TOJO
  • Patent number: 11788881
    Abstract: A detection sensor according to an aspect of the invention includes a vibratable film constituted by a piezoelectric film, a case accommodating the vibratable film, and a circuit board. The vibratable film is configured to be irradiated with infrared rays and thereby generate first electric signals through a pyroelectric effect, and configured to be vibrated by sound waves and thereby generate second electric signals through a piezoelectric effect. The case includes a transmissive part. The transmissive part is configured to transmit at least infrared rays and disposed on one side in a first direction relative to the vibratable film to face the vibratable film. The first direction is a thickness direction of the vibratable film. The circuit board is fixed to the case and disposed on the other side in the first direction relative to the vibratable film. The circuit board has a sound hole to input therethrough sound waves.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: October 17, 2023
    Assignee: HOSIDEN CORPORATION
    Inventors: Tsutomu Matsushita, Hiroyuki Harano, Ryuji Awamura, Hidenori Motonaga, Kensuke Nakanishi
  • Patent number: 11647329
    Abstract: A microphone unit including a tubular case having an opened top and an opened bottom, a waterproof film made of metal that has a thickness of 0.01 mm or more and 0.05 mm or less, a hardness of 100 HV or more, a proof stress of 70 N/mm2 or more, and a tensile strength of 350 N/mm2 or more, the waterproof film being fixed to the bottom of the case so as to block an opening part of the bottom of the case, a substrate arranged in the case, a microphone mounted on the substrate, and a sealing member that seals an opening part of the top of the case.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: May 9, 2023
    Assignee: HOSIDEN CORPORATION
    Inventors: Tsutomu Matsushita, Hiroyuki Harano, Ryuji Awamura, Kensuke Nakanishi
  • Patent number: 11638088
    Abstract: A sound collecting device that is located in a first space and collects sounds generated in a second space isolated from the first space by a predetermined plate, comprising a metal plate, a piezoelectric element fixed on an upper surface of the metal plate, a housing that has a tubular shape having opened upper and lower surfaces, and has an upper end surface adhesively attached to a lower surface of the metal plate and a lower end surface adhesively attached to the predetermined plate, and a vibration pickup terminal that is accommodated in the housing, and comprises a leg part adhesively attached to the lower surface of the metal plate, a shaft part extending downward from the leg part, and a tip part which is formed at a tip of the shaft part in the downward direction and comes into contact with the predetermined plate when the housing is adhesively attached to the predetermined plate.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: April 25, 2023
    Assignee: HOSIDEN CORPORATION
    Inventors: Tsutomu Matsushita, Hiroyuki Harano, Ryuji Awamura, Kensuke Nakanishi
  • Publication number: 20220248132
    Abstract: A microphone unit including a tubular case having an opened top and an opened bottom, a waterproof film made of metal that has a thickness of 0.01 mm or more and 0.05 mm or less, a hardness of 100 HV or more, a proof stress of 70 N/mm2 or more, and a tensile strength of 350 N/mm2 or more, the waterproof film being fixed to the bottom of the case so as to block an opening part of the bottom of the case, a substrate arranged in the case, a microphone mounted on the substrate, and a sealing member that seals an opening part of the top of the case.
    Type: Application
    Filed: January 26, 2022
    Publication date: August 4, 2022
    Applicant: HOSIDEN CORPORATION
    Inventors: Tsutomu MATSUSHITA, Hiroyuki HARANO, Ryuji AWAMURA, Kensuke NAKANISHI
  • Publication number: 20220065691
    Abstract: A detection sensor according to an aspect of the invention includes a vibratable film constituted by a piezoelectric film, a case accommodating the vibratable film, and a circuit board. The vibratable film is configured to be irradiated with infrared rays and thereby generate first electric signals through a pyroelectric effect, and configured to be vibrated by sound waves and thereby generate second electric signals through a piezoelectric effect. The case includes a transmissive part. The transmissive part is configured to transmit at least infrared rays and disposed on one side in a first direction relative to the vibratable film to face the vibratable film. The first direction is a thickness direction of the vibratable film. The circuit board is fixed to the case and disposed on the other side in the first direction relative to the vibratable film. The circuit board has a sound hole to input therethrough sound waves.
    Type: Application
    Filed: August 10, 2021
    Publication date: March 3, 2022
    Applicant: HOSIDEN CORPORATION
    Inventors: Tsutomu MATSUSHITA, Hiroyuki HARANO, Ryuji AWAMURA, Hidenori MOTONAGA, Kensuke NAKANISHI
  • Publication number: 20220021969
    Abstract: The waterproof microphone according to the present invention comprises: a case that includes a partition wall separating an internal space into two chambers, a front chamber and a rear chamber, a hole in the partition wall for allowing communication between the front chamber and the rear chamber, and opening portions in surfaces of the front chamber and the rear chamber that face the partition wall; a waterproof vibrating membrane covering the opening portion of the front chamber; a microphone unit attached to a surface of the partition wall on the rear chamber side; and a sealing member sealing the opening portion of the rear chamber and including an air hole allowing communication between the rear chamber and an external space.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 20, 2022
    Applicant: HOSIDEN CORPORATION
    Inventors: Tsutomu MATSUSHITA, Hiroyuki HARANO, Ryuji AWAMURA, Kensuke NAKANISHI
  • Publication number: 20210345035
    Abstract: A sound collecting device that is located in a first space and collects sounds generated in a second space isolated from the first space by a predetermined plate, comprising a metal plate, a piezoelectric element fixed on an upper surface of the metal plate, a housing that has a tubular shape having opened upper and lower surfaces, and has an upper end surface adhesively attached to a lower surface of the metal plate and a lower end surface adhesively attached to the predetermined plate, and a vibration pickup terminal that is accommodated in the housing, and comprises a leg part adhesively attached to the lower surface of the metal plate, a shaft part extending downward from the leg part, and a tip part which is formed at a tip of the shaft part in the downward direction and comes into contact with the predetermined plate when the housing is adhesively attached to the predetermined plate.
    Type: Application
    Filed: April 23, 2021
    Publication date: November 4, 2021
    Applicant: HOSIDEN CORPORATION
    Inventors: Tsutomu MATSUSHITA, Hiroyuki HARANO, Ryuji AWAMURA, Kensuke NAKANISHI
  • Patent number: 7133556
    Abstract: A character recognition device to recognize characters in a text image read by an image scanner having a first recognition device to recognize the characters in the text image using a first character recognition method and a second recognition device to recognize the characters in the text image using a second character recognition method different from the first character recognition method. An extraction device extracts locations of recognized characters in the text image wherein the recognition results of the first recognition device do not coincide with the recognition results of the second recognition device. An output device outputs character recognition results designating the non-coinciding locations extracted by the extraction device.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: November 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Tsutomu Matsushita, Norikazu Shiiya, Toshikazu Hori, Kouji Yoshimoto
  • Patent number: 6826317
    Abstract: A technology of the present invention is capable of objectively judging an ability of a proofreader who proofreads a digitized document by use OCR programs. A method of managing an ability of a proofreader who proofreads an electronic document generated from a recognition target document by executing a character auto recognition program, comprises a step of estimating a character count of potential mis-recognized characters contained in the electronic document, a step of detecting a mis-recognized character discover count as a mis-recognized character count with which the proofreader discovers the mis-recognized characters in the electronic document, a step of detecting a processing time spent for proofreading the electronic document, and a step of calculating a score relative to a proofreader ability based on a ratio of the potential mis-recognized character count to the mis-recognized character discover count per unit time.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: November 30, 2004
    Assignee: Fujitsu Limited
    Inventors: Akio Fujino, Yoitsu Nakade, Hitoshi Ozawa, Tsutomu Matsushita, Mariko Kita
  • Publication number: 20020025070
    Abstract: A technology of the present invention is capable of objectively judging an ability of a proofreader who proofreads a digitized document by use OCR programs. A method of managing an ability of a proofreader who proofreads an electronic document generated from a recognition target document by executing a character auto recognition program, comprises a step of estimating a character count of potential mis-recognized characters contained in the electronic document, a step of detecting a mis-recognized character discover count as a mis-recognized character count with which the proofreader discovers the mis-recognized characters in the electronic document, a step of detecting a processing time spent for proofreading the electronic document, and a step of calculating a score relative to a proofreader ability based on a ratio of the potential mis-recognized character count to the mis-recognized character discover count per unit time.
    Type: Application
    Filed: March 13, 2001
    Publication date: February 28, 2002
    Inventors: Akio Fujino, Yoitsu Nakade, Hitoshi Ozawa, Tsutomu Matsushita, Mariko Kita
  • Patent number: 5192989
    Abstract: A lateral DMOS FET device which has a small on resistance. The device includes a cell structure formed by a plurality of unit cells, each unit cell including: a source region of first conduction type formed on one side of a substrate of first conduction type; a channel region of second conduction type formed around the source region; and a plurality of drain contact regions of first conduction type located around the channel region; and a source electrode, a gate electrode, and a drain electrode, all of which are formed on the same one side of the substrate. Alternatively, each unit cell may includes: a drain contact region of first conduction type formed on one side of a substrate of first conduction type; a channel region of second conduction type formed around the drain contact region; and a plurality of source regions of first conduction type located around the channel region.
    Type: Grant
    Filed: November 27, 1990
    Date of Patent: March 9, 1993
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tsutomu Matsushita, Teruyoshi Mihara, Masakatsu Hoshi, Kenji Yao
  • Patent number: 5184204
    Abstract: A semiconductor device in which the breakdown voltages of the cell unit and the guard ring can easily be matched, and the surge endurance of the device can be improved. This semiconductor device includes a guard ring region surrounding the cell diffusion layers which is formed from an array of a plurality of guard ring cells, where each of the guard ring cells is identical to each of the cell diffusion layers and the guard ring cells are electrically connected mutually, so that the diffusion depths of each of the cells of the guard ring region and the cell diffusion layers are identical, and consequently the breakdown voltages for the guard ring region and the cell diffusion layers can be made equal to each other.
    Type: Grant
    Filed: January 24, 1991
    Date of Patent: February 2, 1993
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Teruyoshi Mihara, Tsutomu Matsushita, Kenji Yao, Masakatsu Hoshi, Yutaka Enokido, Yukitsugu Hirota
  • Patent number: 5049953
    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity type, in which a drain region is formed in the substrate, and a gate electrode is formed on the surface of the substrate via an insulating film formed thereon. A Schottky metal as a source region is formed in the surface of the substrate away from the drain region, the Schottky metal and the substrate constituting a Schottky junction at an interface therebetween near the gate electrode. A shield layer of a second conductivity type is interposed between the Schottky metal and the substrate except in the Schottky junction. The gate electrode controls tunnel current at the Schottky junction.
    Type: Grant
    Filed: January 18, 1990
    Date of Patent: September 17, 1991
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Teruyoshi Mihara, Kenji Yao, Tsutomu Matsushita, Yoshinori Murakami
  • Patent number: 5040034
    Abstract: A semiconductor device includes a semiconductor substrate as a drain region. A metal source region is located on a first surface of the substrate. The metal and the substrate constitute a Schottky junction. An insulated gate, including a gate electrode and an insulating film surrounding the gate electrode, is adjacent to the Schottky junction, such that angle formed by the Schottky junction and the insulated gate in the substrate is an acute angle. A part of the Schottky metal can be buried in the form of a pillar in the substrate, and a channel region of the Schottky junction can be formed on the pillar near the insulated gate.
    Type: Grant
    Filed: January 18, 1990
    Date of Patent: August 13, 1991
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshinori Murakami, Teruyoshi Mihara, Tsutomu Matsushita, Kenji Yao, Norihiko Kiritani
  • Patent number: 4969020
    Abstract: An improved semiconductor device having a vertical MOS and another MOS circuit such as C-MOS is shown. To insulate the circuit from influences from the operation of the vertical MOS, the vertical MOS is fabricated in a diffused region which is formed on a semiconductor substrate while the circuit is fabricated in an epitaxial layer of an opposite conductivity type to that of the substrate.
    Type: Grant
    Filed: February 17, 1988
    Date of Patent: November 6, 1990
    Assignee: Nissan Motor Company Limited
    Inventors: Tsutomu Matsushita, Koichi Murakami
  • Patent number: 4937639
    Abstract: An input protector device for a semiconductor device such as a CMOS device, in which a first resistor is formed on an insulating film of a semiconductor substrate, and a second resistor is formed of an impurity diffusion region in the substrate, the first and second resistors and a capacitor being coupled to one another in series to constitute a filter circuit, and in which first and second diodes each cooperated with at least one of the first and second resistors, by-passing noises having low and high voltages, respectively, and a high frequency noise is cut by the filter circuit, thereby effectively preventing latchup.
    Type: Grant
    Filed: October 14, 1988
    Date of Patent: June 26, 1990
    Assignee: Nissan Motor Company, Limited
    Inventors: Kenji Yao, Teruyoshi Mihara, Noriyuki Abe, Tsutomu Matsushita
  • Patent number: 4928159
    Abstract: A single-chip integrated semiconductor device, in which a P-type isolation layer, to which the ground voltage is applied, is grown on a semiconductor substrate and a power voltage is applied to the substrate, in which a vertical MOSFET has a drain region of a first N-type well region formed in the P-type isolation layer so as to reach the semiconductor substrate therethrough, and is used in an output device for a load, in which a P-channel MOSFET is provided in the N-type well region formed in the P-type isolation layer, a constant voltage lower than the power voltage being applied to the N-type well region, and an N-channel MOSFET is formed in the P-type isolation layer, and in which the P-channel and N-channel MOSFETs constitute a CMOS circuit constructing a peripheral circuit for the vertical MOSFET.
    Type: Grant
    Filed: December 5, 1988
    Date of Patent: May 22, 1990
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Teruyoshi Mihara, Tsutomu Matsushita
  • Patent number: 4893158
    Abstract: A power MOSFET is provided with a protective circuit including a monitor MOSFET whose drain is connected with the drain of the power MOSFET, a monitor resistor connected betwen the sources of the power and monitor MOSFETs, and a monitor transistor for decreasing a gate voltage of the power MOSFET when a voltage across the monitor resistor exceeds a predetermined level representing a dangerous condition of the device.
    Type: Grant
    Filed: June 20, 1988
    Date of Patent: January 9, 1990
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Teruyoshi Mihara, Yukitsugu Hirota, Yukio Hiramoto, Tsutomu Matsushita