Patents by Inventor Tsutomu Nomoto
Tsutomu Nomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6442312Abstract: An optical filter is manufactured by placing a photosensitive optical fiber in a spiral arrangement on a fiber holder, preferably having a spiral groove for holding the fiber, and exposing the fiber to ultraviolet light through a phase mask having a spiral diffraction grating, forming an in-fiber Bragg grating. The fiber can be conveniently scanned by an ultraviolet beam as the fiber holder and phase mask turn on a rotating stage. The fiber can be compactly packaged between the fiber holder and a cover. The fiber holder and cover can be formed by coating a substrate with layers of polymer material, the spiral groove being formed by photolithographic patterning of one of the layers.Type: GrantFiled: August 24, 2000Date of Patent: August 27, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Yoshitaka Terao, Tsutomu Nomoto, Akihiko Nishiki
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Patent number: 6297842Abstract: A light-emitting array and its driving circuitry are integrated into a single device. The driving circuitry is formed in a semiconductor substrate and has an array of output terminals on a surface of the substrate. Organic electroluminescent elements are formed directly over the output terminals, in electrical contact with the output terminals. The electroluminescent elements are driven by direct current. An optical head assembly has one or more of these light-emitting arrays mounted on a printed circuit board.Type: GrantFiled: September 21, 1995Date of Patent: October 2, 2001Assignee: Oki Data CorporationInventors: Masumi Koizumi, Yichao Jiang, Tsutomu Nomoto, Ichimatsu Abiko
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Patent number: 6174648Abstract: An optical filter is manufactured by placing a photosensitive optical fiber in a spiral arrangement on a fiber holder, preferably having a spiral groove for holding the fiber, and exposing the fiber to ultraviolet light through a phase mask having a spiral diffraction grating, forming an in-fiber Bragg grating. The fiber can be conveniently scanned by an ultraviolet beam as the fiber holder and phase mask turn on a rotating stage. The fiber can be compactly packaged between the fiber holder and a cover. The fiber holder and cover can be formed by coating a substrate with layers of polymer material, the spiral groove being formed by photolithographic patterning of one of the layers.Type: GrantFiled: July 2, 1998Date of Patent: January 16, 2001Assignee: Oki Electric Industry Co., Ltd.Inventors: Yoshitaka Terao, Tsutomu Nomoto, Akihiko Nishiki
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Patent number: 5955748Abstract: An end facet light emitting type LED has a slanted light emitting side wall relative to a substrate surface. A method for manufacturing end facet light emitting type light emitting devices prevents the pn-junction regions of the devices from being damaged while a semiconductor wafer is diced to separate light emitting devices from one another. A recess is formed on the semiconductor wafer having a depth which is deeper than the pn-junction. A portion to be cut during dicing of the wafer is vertically and horizontally separated from the pn-junction regions, so that if cracks occur when the wafer is diced, the cracks do not affect the light emitting characteristics of the devices.Type: GrantFiled: October 1, 1997Date of Patent: September 21, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Yukio Nakamura, Mitsuhiko Ogihara, Masumi Taninaka, Takao Kusano, Masumi Koizumi, Hiroyuki Fujiwara, Makoto Ishimaru, Masaharu Nobori, Tsutomu Nomoto
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Patent number: 5539551Abstract: A plurality of address wiring layers and a plurality of data wiring layers are arranged to cross each other at a right angle. TFTs are respectively arranged at the intersections between the address wiring layers and the data wiring layers. The gate electrode of each TFT is connected to an address wiring layer for each row. The drain electrode of each TFT is connected to a data wiring layer for each column. Display electrodes are respectively arranged in the regions defined by the address wiring layers and the data wiring layers, and are connected to the source electrodes of the TFTs arranged in the respective regions. The data wiring layers and the source and drain electrodes of the TFTs each comprise the first layer serving as an ohmic barrier layer for a semiconductor layer, the second layer forming of a conductive material and serving as a main signal wiring layer, and the third layer serving as a battery reaction preventing layer.Type: GrantFiled: December 16, 1993Date of Patent: July 23, 1996Assignees: Casio Computer Co., Ltd., Oki Electric Industry Co., Ltd.Inventors: Tsutomu Nomoto, Hideki Kamada, Ichiro Ohno
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Patent number: 5504348Abstract: A thin film transistor array comprises an insulative substrate, a plurality of pixel electrodes arranged in a matrix on the insulative substrate, a plurality of thin film transistors connected respectively to the pixel electrodes, a plurality of address lines formed on the insulative substrate, each address line being connected to a plurality of control electrodes of the thin film transistors, and a plurality of data lines arranged on the insulative substrate in such a manner as to intersect the address lines, each data line being connected to a plurality of data input electrodes of the thin film transistors. A short-wiring is formed on the outside of a display region on the insulative substrate on which the pixel electrodes are arranged, and the short-wiring is connected to at least two of the address lines and the data lines by a two-terminal element having non-linear resistance characteristics defining voltage/current characteristics on the basis of a space charge limited current.Type: GrantFiled: March 20, 1995Date of Patent: April 2, 1996Assignees: Casio Computer Co., Ltd., Oki Electric Industry Co., Ltd.Inventors: Mamoru Yoshida, Makoto Sasaki, Hiroyuki Okimoto, Tsutomu Nomoto, Shunichi Sato
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Patent number: 5307189Abstract: An active-matrix-addressed liquid crystal display includes an active-matrix substrate and an opposing electrode substrate on which opposing electrodes are formed. The opposing electrodes are formed into a combination of stripe electrodes each for collecting an electric field originating from the associated data line conductor, and display electrodes each corresponding to the associated pixel electrode. The stripe electrodes are connected with the associated display electrodes outside display areas. There are provided on the opposing electrode substrate a black mask formed of a photosensitive resin in which pigment of black is dispersed. The opposing electrodes may also be formed in an assembly of stripe electrodes each correspondingly to the associated pixel electrodes, no opposing electrode being disposed above the data line conductor.Type: GrantFiled: March 4, 1992Date of Patent: April 26, 1994Assignee: Oki Electric Industry Co., Ltd.Inventors: Akihiko Nishiki, Shigeki Ogura, Kayo Yoshizawa, Tsutomu Nomoto
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Patent number: 5225364Abstract: A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode.Type: GrantFiled: May 28, 1991Date of Patent: July 6, 1993Assignee: Oki Electric Industry Co., Ltd.Inventors: Tsutomu Nomoto, Masumi Koizumi, Akihiko Nishiki
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Patent number: 5070379Abstract: A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode.Type: GrantFiled: June 19, 1990Date of Patent: December 3, 1991Assignee: Oki Electric Industry Co., Ltd.Inventors: Tsutomu Nomoto, Masumi Koizumi, Akihiko Nishiki
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Patent number: 4885622Abstract: A PIN photodiode is composed of a lower electrode deposited on a substrate, a photoelectric transducer of PIN construction deposited on the lower electrode, and an upper electrode deposited on the photoelectric transducer. A method of fabricating the PIN photodiode is also disclosed. All of electron-and-hole pairs generated in the photoelectric transducer in response to application of light are biased by the lower and upper electrodes. These electron-and-hole pairs are quickly picked up as a current between the electrodes for detecting the light falling on the PIN photodiode.Type: GrantFiled: June 6, 1988Date of Patent: December 5, 1989Assignee: Oki Electric Industry Co., Ltd.Inventors: Akira Uchiyama, Yuuichi Masaki, Toshiyuki Iwabuchi, Tsutomu Nomoto, Masaaki Sakamoto
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Patent number: 4859617Abstract: In a thin-film transistor fabrication process using an amorphous silicon semiconductor layer, after the gate insulation layer is formed and before the a-Si semiconductor layer is formed, the surface of the gate insulation layer is treated with an H.sub.2 plasma. This treatment improves the transistor characteristics.Type: GrantFiled: June 3, 1988Date of Patent: August 22, 1989Assignee: Oki Electric Industry Co., Ltd.Inventors: Tsutomu Nomoto, Mamoru Yosida, Mikio Mouri, Tsukasa Watanabe
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Patent number: 4816885Abstract: A thin-film transistor matrix comprises thin-film transistors formed on a dielectric substrate and arranged in rows and columns. Each of the transistors comprises a control electrode, an insulation film formed on the control electrode, a semiconductor film formed on the insulation film, a first main electrode formed on the semiconductor film, and a second main electrode formed on the semiconductor film. Row interconnection layers are provided for the respective rows to interconnect the control electrodes of the transistors of the respective rows. Column interconnection layers are provided for the respective columns to interconnect the first main electrodes in the respective columns. The insulation film and the semiconductor film are formed in the regions where the transistor is formed and in the regions where the column interconnection layer is formed.Type: GrantFiled: May 8, 1987Date of Patent: March 28, 1989Assignee: Oki Electric Industry Co., Ltd.Inventors: Mamoru Yoshida, Tsutomu Nomoto, Tomoo Araki, Tsukasa Watanabe
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Patent number: 4136274Abstract: A thermal head for a thermal printer having a dielectric support and a plurality of conductive layers made of a single material has been found. Said conductive layer comprises a pair of lead lines at both the extreme ends of the same and a heater line formed in a zigzag fashion between said lead lines, and the material of the conductive layer is, for instance, nickel. A portion of said lead line is plated with a conductive material whose conductivity is better than that of the heater. Said heater line is covered with single protection layer of Al.sub.2 O.sub.3.Type: GrantFiled: April 5, 1977Date of Patent: January 23, 1979Assignee: Oki Electric Industry Co., Ltd.Inventors: Susumu Shibata, Tsutomu Nomoto, Keiji Murasugi