Abstract: An optical communication module includes: a circuit board; optical communication devices that are provided on an upper surface side of the circuit board; a case that accommodates the circuit board and the optical communication devices; and a heatsink that is attached to the case. The optical communication devices include a first device and a second device. The first device is located closer to an inlet opening for cooling air for cooling the heatsink than the second device is. A height from the circuit board to a top of the first device is greater than a height from the circuit board to a top of the second device. The heatsink is not equipped with a cooling fin in a first region where the first device is provided, and the heatsink is equipped with a cooling fin in a second region where the second device is provided.

Abstract: An optical communication module includes: a circuit board; optical communication devices that are provided on an upper surface side of the circuit board; a case that accommodates the circuit board and the optical communication devices; and a heatsink that is attached to the case. The optical communication devices include a first device and a second device. The first device is located closer to an inlet opening for cooling air for cooling the heatsink than the second device is. A height from the circuit board to a top of the first device is greater than a height from the circuit board to a top of the second device. The heatsink is not equipped with a cooling fin in a first region where the first device is provided, and the heatsink is equipped with a cooling fin in a second region where the second device is provided.

Abstract: An optical transceiver includes a single-fiber bidirectional optical transmission/reception device, a circuit board, a transmission-side FPC, a reception-side FPC and a separation wall. The optical transceiver includes a single-fiber bidirectional optical transmission/reception device includes an LD stem that converts an electric signal into an optical signal and transmits it, and a PD stem that receives the optical signal and converts it into an electric signal. The transmission-side FPC electrically connects the LD stem and the circuit board. The reception-side FPC electrically connects the PD stem and the circuit board. The separation wall is formed between the transmission-side FPC and the reception-side FPC, and grounded to the chassis of the optical transceiver. The reception-side FPC is folded and set between the chassis and the separation wall such that the board front surface is an inner side, where the micro-strip line is formed on the above board front surface.

Abstract: An electronic apparatus includes a substrate, a device including a flange, the device being mounted at a first side of the substrate, a plate arranged at a position corresponding to the device at a second side of the substrate, the second side being opposite to the first side, and a securing member that secures the device to the substrate.

Abstract: An optical module is accommodated in a cage. The optical module includes a case that accommodates optical parts. A projection having a vertical surface perpendicular to a longitudinal direction of the case is provided on a surface of the case. A slide member includes a base part, an inclined part and a slide tab. The base part is attached on one end of the case and movable in the longitudinal direction of the case. The inclined part extends in an oblique direction from the base part. The slide tab extends in the longitudinal direction beyond the projection and is movable in the longitudinal direction within a predetermined moving range. A protruding part protruding from the surface of the case is provided on a side of the base part of the slide member with respect to the projection.

Abstract: The invention relates to semiconductor integrated circuit devices having a circuit operating in synchronism with a clock signal, and it is an object of the invention to provide a semiconductor integrated circuit device in which clock skew between lines that occurs as a result of a change in the circuit layout of the LSI can be easily optimized. There is provided a configuration including an inverter of a clocked circuit formed on a silicon substrate and operating in synchronism with a clock signal, an inverter of a clock timing adjusting circuit formed in an SOI structure, and a via hole for electrically connecting the inverters.