Abstract: An electronic component includes: a plurality of first substrates that are connected in series along a coupling path; and a second substrate that is connected with one first substrate of the plurality of first substrates. The second substrate is in line with the one first substrate along a connection direction intersecting the coupling path, and the plurality of first substrates and the second substrate are configured to be foldable such that they are stacked.

Abstract: Disclosed is a build-up welding material and a machinery part welded with a weld overlay metal. The build-up welding material contains C of 0.2 to 1.0 percent by mass, Si of 0.2 to 0.5 percent by mass, Mn of 0.5 to 2.0 percent by mass, Cr of 15 to 30 percent by mass, Mo of 0.2 to 6.0 percent by mass, and W of 0.1 to 1.5 percent by mass, with the remainder including Fe and inevitable impurities.

Abstract: An electronic component includes: a plurality of first substrates that are connected in series along a coupling path; and a second substrate that is connected with one first substrate of the plurality of first substrates. The second substrate is in line with the one first substrate along a connection direction intersecting the coupling path, and the plurality of first substrates and the second substrate are configured to be foldable such that they are stacked.

Abstract: An electronic component includes a base substance, a cooling channel formed in the base substance and flows a cooling medium in a second direction from a first direction, a radiator formed in a surface of the cooling channel using a material of which thermal conductivity is higher than a thermal conductivity of the base substance or formed so that the radiator may project to the cooling channel, and that contacts the cooling medium.

Abstract: An interposer includes a substrate includes a plurality of penetrating electrodes, and a wiring portion formed on the substrate, in which the wiring portion includes a wiring layer electrically connected to the penetrating electrodes and an insulating layer covering the wiring layer. The interposer includes a plurality of first UBM structures provided at a side opposite the substrate of the wiring portion, in which the first UBM structures are electrically connected to the wiring layer. The interposer includes a plurality of bumps provided at the side opposite the wiring portion of the substrate, in which the plurality of bumps is electrically connected to each of the penetrating electrodes via a plurality of second UBM structures.

Abstract: Provided a build-up welding material which contains C: 0.2 to 1.5 mass %, Si: 0.5 to 2 mass %, Mn: 0.5 to 2 mass %, Cr: 20 to 40 mass %, Mo: 2 to 6 mass %, Ni: 0.5 to 6 mass %, V: 1 to 5 mass % and W: 0.5 to 5 mass %, with the balance being Fe and unavoidable impurities.

Abstract: Disclosed is a build-up welding material and a machinery part welded with a weld overlay metal. The build-up welding material contains C of 0.2 to 1.0 percent by mass, Si of 0.2 to 0.5 percent by mass, Mn of 0.5 to 2.0 percent by mass, Cr of 15 to 30 percent by mass, Mo of 0.2 to 6.0 percent by mass, and W of 0.1 to 1.5 percent by mass, with the remainder including Fe and inevitable impurities.

Abstract: An electronic component includes a base substance, a cooling channel formed in the base substance and flows a cooling medium in a second direction from a first direction, a radiator formed in a surface of the cooling channel using a material of which thermal conductivity is higher than a thermal conductivity of the base substance or formed so that the radiator may project to the cooling channel, and that contacts the cooling medium.

Abstract: A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.

Abstract: A wiring board includes at least one signal layer, at least one ground layer, at least one power plane, at least one power supply via that electrically conducts wiring over one substrate surface where a semiconductor device chip is mounted, wiring over another substrate surface, and the power plane, and signal wiring for performing signal transmission between a plurality of semiconductor device chips. The power plane is placed to the one substrate surface side than the signal wiring. The power supply via is composed of a large diameter aperture and a small diameter aperture. The large diameter aperture has a relatively large diameter and is formed from the one substrate surface to the power plane, and the small diameter aperture has a relatively small diameter and is formed from the power plane to the other substrate surface.

Abstract: Provided a build-up welding material which contains C: 0.2 to 1.5 mass %, Si: 0.5 to 2 mass %, Mn: 0.5 to 2 mass %, Cr: 20 to 40 mass %, Mo: 2 to 6 mass %, Ni: 0.5 to 6 mass %, V: 1 to 5 mass % and W: 0.5 to 5 mass %, with the balance being Fe and unavoidable impurities.

Abstract: An interposer includes a substrate includes a plurality of penetrating electrodes, and a wiring portion formed on the substrate, in which the wiring portion includes a wiring layer electrically connected to the penetrating electrodes and an insulating layer covering the wiring layer. The interposer includes a plurality of first UBM structures provided at a side opposite the substrate of the wiring portion, in which the first UBM structures are electrically connected to the wiring layer. The interposer includes a plurality of bumps provided at the side opposite the wiring portion of the substrate, in which the plurality of bumps is electrically connected to each of the penetrating electrodes via a plurality of second UBM structures.

Abstract: A wiring board includes at least one signal layer, at least one ground layer, at least one power plane, at least one power supply via that electrically conducts wiring over one substrate surface where a semiconductor device chip is mounted, wiring over another substrate surface, and the power plane, and signal wiring for performing signal transmission between a plurality of semiconductor device chips. The power plane is placed to the one substrate surface side than the signal wiring. The power supply via is composed of a large diameter aperture and a small diameter aperture. The large diameter aperture has a relatively large diameter and is formed from the one substrate surface to the power plane, and the small diameter aperture has a relatively small diameter and is formed from the power plane to the other substrate surface.

Abstract: A printed circuit board is provided which is capable of shortening intervals among core layer vias and suppressing high impedance. After the core layer vias each having a cylindrical conducting layer are formed so that conducting portions come into contact with one another, a punching process is performed along a symmetric axis of each of four core layer vias so that a through-hole of a specified diameter passes through a core board to form the core layer vias separated from one another and the through-hole is filled with an insulator and a punching process is performed along a central axis of the through-hole filled with the insulator so as to pass through the core board to form the through-hole having a diameter being shorter than that of the through-hole and the conducting layer is formed on an inside wall of the through-hole to form the core layer via.

Abstract: A wiring board has a plurality of wiring layers, a first land, a second land, a first via and a second via. The first land and the second land are formed on at least one wiring layer of the wiring board and are disposed to partially overlap with each other. The first via and the second via are formed in association with the first land and the second land, respectively. The first via and the second via electrically connect a first wiring layer and a second wiring layer of the plurality of wiring layers to each other. The wiring board has a separator that is formed by a hole that separates the first land and the second land from each other.

Abstract: A printed circuit board is provided which is capable of shortening intervals among core layer vias and suppressing high impedance. After the core layer vias each having a cylindrical conducting layer are formed so that conducting portions come into contact with one another, a punching process is performed along a symmetric axis of each of four core layer vias so that a through-hole of a specified diameter passes through a core board to form the core layer vias separated from one another and the through-hole is filled with an insulator and a punching process is performed along a central axis of the through-hole filled with the insulator so as to pass through the core board to form the through-hole having a diameter being shorter than that of the through-hole and the conducting layer is formed on an inside wall of the through-hole to form the core layer via.

Abstract: A base film for a magnetic recording medium including one surface, on which a magnetic layer can be formed, having a surface roughness of center line average roughness Ra of 10 nm or less, a ten-point average roughness Rz of 80 nm or less and a maximum height Rmax of 150 nm or less. The base film includes the other surface having a surface roughness of center line average roughness Ra of 4.5 to 20 nm, a ten-point average roughness Rz of 35 to 350 nm and a maximum height Rmax of 40 to 400 nm.