Patents by Inventor Tsutomu Tenma

Tsutomu Tenma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4674034
    Abstract: A modular data processing unit includes first through fourth memories and an arithmetic unit all connected in a recirculating pipeline mode. An interface unit couples an external bus to the pipeline bus at a point between the arithmetic unit and first memory, and the fourth memory provides outputs to either the arithmetic unit or the interface unit. Data, instructions and addresses are transferred to the first memory via the interface unit, which addresses the second memory for storing instructions. In accordance with the output of the second memory, data is stored in the third memory. The arithmetic unit operates on the data in accordance with the instructions, and the fourth memory acts as a buffer for temporarily storing data while awaiting transfer to the arithmetic unit or interface unit. The transfer of data to the arithmetic unit from the fourth memory in addition to the transfer of data between modules, is controlled in accordance with the available storage capacity in the fourth memory.
    Type: Grant
    Filed: December 12, 1985
    Date of Patent: June 16, 1987
    Assignee: Nippon Electric Co. Ltd.
    Inventors: Masao Iwashita, Tsutomu Tenma
  • Patent number: 4594653
    Abstract: A modular data processing unit includes first through fourth memories and an arithmetic unit all connected in a recirculating pipeline mode. An interface unit couples an external bus to the pipeline bus at a point between the arithmetic unit and first memory, and the fourth memory provides outputs to either the arithmetic unit or the interface unit. Data, instructions and addresses are transferred to the first memory via the interface unit, which addresses the second memory for storing instructions. In accordance with the output of the second memory, data is stored in the third memory. The arithmetic unit operates on the data in accordance with the instructions, and the fourth memory acts as a buffer for temporarily storing data while awaiting transfer to the arithmetic unit or interface unit. The transfer of data to the arithmetic unit from the fourth memory in addition to the transfer of data between modules, is controlled in accordance with the available storage capacity in the fourth memory.
    Type: Grant
    Filed: October 22, 1982
    Date of Patent: June 10, 1986
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Masao Iwashita, Tsutomu Tenma