Patents by Inventor Tsuyoshi Hasuka

Tsuyoshi Hasuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180259647
    Abstract: An imaging device includes: a controller which generates a light emission signal and an exposure signal; a light source unit which receives the light emission signal and emits light; a light receiver which obtains the exposure amount of reflected light at a timing in accordance with the exposure signal; and a calculator which outputs a distance signal (distance image) by calculation on the basis of the amount of signals included in imaging signals received from the light receiver. The controller generates two or more patterns of varying phase relationships between the light emission signal and the exposure signal, and outputs the light emission signal and the exposure signal in a cycle that is different between at least two of the patterns.
    Type: Application
    Filed: May 9, 2018
    Publication date: September 13, 2018
    Inventors: Haruka TAKANO, Tomohiko KANEMITSU, Tsuyoshi HASUKA, Mitsuhiko OTANI
  • Patent number: 7898589
    Abstract: A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets an accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: March 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Shinji Yamamoto, Toshiya Fujii, Kazuyuki Inokuma, Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu
  • Patent number: 7884872
    Abstract: A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: February 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu, Yoshiaki Kato
  • Publication number: 20100188536
    Abstract: The semiconductor element according to an aspect of the present invention is a solid-state imaging element formed on a semiconductor substrate, having an overflow drain structure for draining excessive charges generated in photoelectric conversion elements, and reading out signal charges accumulated in the photoelectric conversion elements to a vertical transfer unit via a readout gate electrode. The solid-state imaging element includes: a first voltage generating circuit which applies, to the semiconductor substrate, substrate voltage defining the height of overflow barrier in the overflow drain structure; and a second voltage generating circuit which selectively generates first voltage and second voltage each including the height of pulse wave superimposed onto the substrate voltage, at a time when readout pulse to be applied to the readout gate electrode is generated.
    Type: Application
    Filed: July 9, 2008
    Publication date: July 29, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tsuyoshi Hasuka, Toshihiro Kuriyama, Hiroyuki Mori, Junji Manabe
  • Patent number: 7719594
    Abstract: A solid-state imaging device, and a camera provided with this device, that can output high quality images at high speed are realized by preventing improper OB clamping in a solid-state imaging device that performs pixel mixing in the horizontal direction. Vertical final stages, which are the transfer stages closest to a horizontal transfer component 4, are provided with provided with independent transfer electrodes V3-1, V3-2, V3-3, V6-1, V5-2, and V5-3 that are independent of other columns in a region between the horizontal transfer component and an effective pixel region, and a common transfer electrode that is common to all of the columns in the region between the horizontal transfer component 4 and the OB region. Further, in the vertical final stages, the entire region between the OB region and the horizontal transfer component, or the region minus openings formed for the wiring of V3-1 and V5-1 in the columns closest to the effective pixel region, is covered with a light blocking film.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: May 18, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshiaki Kato, Kazuya Yonemoto, Tsuyoshi Hasuka
  • Patent number: 7564492
    Abstract: The present invention provides a solid-state image sensing device that can reduce at least the number of pixels arranged in the horizontal direction and can output high quality picture signals at high speed without generating moire or alias.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: July 21, 2009
    Assignee: Panasonic Corporation
    Inventors: Ryoichi Nagayoshi, Toshiya Fujii, Tsuyoshi Hasuka, Akiyoshi Kohno, Shinichi Tashiro, Keijiro Itakura
  • Patent number: 7420606
    Abstract: A timing generator, includes: a first memory circuit that stores timing generation information; a first register for holding the timing generation information in the first memory circuit; a first external input part for accessing to the first register so as to rewrite data therein; a selector that selects one of the first memory circuit and the first external input part in order to conduct writing of data in the first register; and a pulse generation part that generates a pulse timing in accordance with the timing generation information held in the first register so as to output a single or a plurality of pulses. A pulse timing required for driving a solid-state imaging device and the like can be generated easily and the timing generation can be rewritten externally.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: September 2, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsumi Takeda, Junji Tokumoto, Yoshiaki Sone, Tsuyoshi Hasuka
  • Publication number: 20070091189
    Abstract: A solid-state imaging device, and a camera provided with this device, that can output high quality images at high speed are realized by preventing improper OB clamping in a solid-state imaging device that performs pixel mixing in the horizontal direction. Vertical final stages, which are the transfer stages closest to a horizontal transfer component 4, are provided with provided with independent transfer electrodes V3-1, V3-2, V3-3, V6-1, V5-2, and V5-3 that are independent of other columns in a region between the horizontal transfer component and an effective pixel region, and a common transfer electrode that is common to all of the columns in the region between the horizontal transfer component 4 and the OB region. Further, in the vertical final stages, the entire region between the OB region and the horizontal transfer component, or the region minus openings formed for the wiring of V3-1 and V5-1 in the columns closest to the effective pixel region, is covered with a light blocking film.
    Type: Application
    Filed: September 20, 2006
    Publication date: April 26, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshiaki Kato, Kazuya Yonemoto, Tsuyoshi Hasuka
  • Publication number: 20070023785
    Abstract: A driving method is applied to a solid-state imaging apparatus having photoelectric conversion portions, transfer portion for reading out signal charges, and an excess charge draining portion for draining charges exceeding a saturation charge amount that is set by a reference voltage. One of driving modes is selected from a full pixel mode in which accumulated signal charges are detected individually for each pixel and a pixel mixing mode in which signal charges of a predetermined number of pixels are mixed to be detected. In the full pixel mode, the draining portion is supplied with the reference voltage having the same value during a charge accumulation period and a read transfer period for read transferring charges. In the pixel mixing mode, the draining portion is supplied with the reference voltage having a low level during the charge accumulation period and the reference voltage having a high level during the read transfer period.
    Type: Application
    Filed: July 10, 2006
    Publication date: February 1, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu, Yoshiaki Kato
  • Publication number: 20050062857
    Abstract: A drive unit 120 sets a saturation amount in a read period in which charges generated in pixels are read to vertical CCDs to be lower in a combination mode than in an individual mode (see Vsub in count values 22 to 24 in FIG. 6). As a result, excess charges in the pixels are drained to an n-type substrate 11. The drive unit 120 also sets al accumulation period to be shorter in combination mode than in individual mode (see Vsub in each mode in FIG. 6).
    Type: Application
    Filed: September 30, 2004
    Publication date: March 24, 2005
    Inventors: Shinji Yamamoto, Toshiya Fujii, Kazuyuki Inokuma, Tsuyoshi Hasuka, Ryoichi Nagayoshi, Keijirou Itakura, Izumi Shimizu
  • Publication number: 20050012822
    Abstract: A timing generator, includes: a first memory circuit that stores timing generation information; a first register for holding the timing generation information in the first memory circuit; a first external input part for accessing to the first register so as to rewrite data therein; a selector that selects one of the first memory circuit and the first external input part in order to conduct writing of data in the first register; and a pulse generation part that generates a pulse timing in accordance with the timing generation information held in the first register so as to output a single or a plurality of pulses. A pulse timing required for driving a solid-state imaging device and the like can be generated easily and the timing generation can be rewritten externally.
    Type: Application
    Filed: July 14, 2004
    Publication date: January 20, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsumi Takeda, Junji Tokumoto, Yoshiaki Sone, Tsuyoshi Hasuka
  • Publication number: 20040150733
    Abstract: The present invention provides a solid-state image sensing device that can reduce at least the number of pixels arranged in the horizontal direction and can output high quality picture signals at high speed without generating moire or alias.
    Type: Application
    Filed: November 12, 2003
    Publication date: August 5, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ryoichi Nagayoshi, Toshiya Fujii, Tsuyoshi Hasuka, Akiyoshi Kohno, Shinichi Tashiro, Keijiro Itakura