Patents by Inventor Tsuyoshi Hirose

Tsuyoshi Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5638012
    Abstract: A write driver for writing write data to a magnetic disk. The write driver is provided with first and second pnp type input transistors whose bases are each supplied with a pair of complementary input signals, and first and second npn type output transistor in the form of an inverted Darlington arrangement. A first resistor element is provided between the emitter of a corresponding pnp type input transistor and the collector of a npn type output transistor, whereas a second resistor element is provided between the common collector of the first and second npn type output transistors and supply voltage. The collectors of the first and second pnp type transistor are supplied with clamp voltage. Third and fourth npn type output transistors each connected to the first and second npn type output transistors in series and subjected to complementary switching control are provided to form a bridge circuit and to drive an inductive head.
    Type: Grant
    Filed: October 18, 1995
    Date of Patent: June 10, 1997
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Takashi Hashimoto, Noriaki Hatanaka, Masaki Yoshinaga, Yuji Nagaya, Tsuyoshi Hirose, Yuji Soga, Tadao Kaji
  • Patent number: 5550292
    Abstract: A benzylamine derivative or salt thereof having antidepressant and antianxiety activities having the general formula: ##STR1## wherein R.sup.1 is a lower alkyl group;R.sup.2 is a cycloalkyl group; andR.sup.3 is a halogen atom;or salt thereof.
    Type: Grant
    Filed: April 29, 1995
    Date of Patent: August 27, 1996
    Assignee: Otsuka Pharmaceutical Co., Ltd.
    Inventors: Yohji Sakurai, Nobuyuki Kurahashi, Tsuyoshi Hirose, Takashi Miwa, Atsushi Mori, Takao Nishi
  • Patent number: 5434717
    Abstract: A timing adjusting circuit is provided to define the operating order of a differential amplifier circuit for amplifying read-out signals and an output circuit in order to minimize changes in output DC level. A damping resistor is disposed between two magnetic head terminals and a clamp circuit in a magnetic head driving circuit. To attend to a composite head configuration, short-circuiting with a power supply and a current flowing into the magnetic head during a non-write operation are detected as abnormalities. In addition, short-circuiting and open-circuiting of the magnetic head are also detected as abnormalities. Also, a read circuit is added to a write magnetic head, in order to output read-out signals in a read mode, so that the read-out signals are utilized for detecting errors in read-out signals from an exclusively designed read head or for detecting and correcting such errors.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: July 18, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Yoshinaga, Yuji Nagaya, Tsuyoshi Hirose, Noriaki Hatanaka, Tomoaki Hirai, Tatsuo Mochizuki
  • Patent number: 5392172
    Abstract: A magnetic head circuit for a plurality of magnetic heads includes two emitter follower transistors for receiving magnetic head writing data, two differential transistors connected to the two emitter follower transistors for performing differential operation control thereover, and two resistors connected to collectors of the two differential transistors for supplying a base current to the two emitter follower transistors, and wherein the emitter follower transistors are connected in series with each other to perform differential switch operations over a magnetic head writing current. A magnetic head fly-back voltage has a clamp voltage which varies according to a writing current flowing through a pair of signal terminals. A pair of differential transistors, whose bases are connected to the pair of signal terminals and whose emitters are connected directly to each other, are operated according to a voltage appearing between the pair of signal terminals.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: February 21, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Masaki Yoshinaga, Noriaki Hatanaka, Tomoaki Hirai, Yuji Nagaya, Tsuyoshi Hirose, Tadao Kaji