Patents by Inventor Tsuyoshi Kida

Tsuyoshi Kida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935803
    Abstract: A resin composition that has excellent flux activity, flexibility and storage stability and that is suitable for a pre-applied underfill material is provided. The resin composition contains a compound (A) having a phenolic hydroxy group, a metal ion trapping agent (B) and a radical polymerizable compound (C).
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: March 19, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi Okaniwa, Takenori Takiguchi, Kohei Higashiguchi, Tsuyoshi Kida
  • Patent number: 11924979
    Abstract: A resin composition that has both excellent flux activity and high insulation reliability, that possesses good storage stability, and that further has flexibility with good operability upon being used as a laminate is provided. The resin composition contains a chelating flux agent (A), a thermal radical polymerization initiator (B) and a radical polymerizable compound (C).
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: March 5, 2024
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi Okaniwa, Takenori Takiguchi, Kohei Higashiguchi, Tsuyoshi Kida
  • Publication number: 20220389130
    Abstract: The present application provides a film containing: a compound (A) containing at least one selected from the group consisting of a maleimide compound and a citraconimide compound; an organic peroxide (B) containing at least one selected from the group consisting of organic peroxides represented by specific formulae; and an imidazole compound (C) represented by a specific formula.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 8, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi OKANIWA, Kohei HIGASHIGUCHI, Takahito SEKIDO, Kentaro TAKANO, Tsuyoshi KIDA
  • Publication number: 20220380508
    Abstract: A resin composition containing a bismaleimide compound (A) containing a constituent unit represented by the following formula (1) and maleimide groups at both ends of the molecular chain, a radical polymerizable resin or compound (B) other than the bismaleimide compound (A), and a curing accelerator (C), wherein the radical polymerizable resin or compound (B) contains at least one selected from the group consisting of a citraconimide group, a vinyl group, a maleimide group, a (meth)acryloyl group and an allyl group.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 1, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi OKANIWA, Kentaro TAKANO, Tsuyoshi KIDA
  • Publication number: 20220344227
    Abstract: The present application provides a film containing: a compound (A) containing at least one selected from the group consisting of a maleimide compound and a citraconimide compound; an organic peroxide (B) containing at least one selected from the group consisting of organic peroxides represented by specific formulae; and a hydroperoxide (C).
    Type: Application
    Filed: June 26, 2020
    Publication date: October 27, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi OKANIWA, Kohei HIGASHIGUCHI, Takahito SEKIDO, Kentaro TAKANO, Tsuyoshi KIDA
  • Publication number: 20220332868
    Abstract: A film containing: a propenyl group-containing resin (A) including, at an end of a molecule, a constituent unit represented by the following formula (1); a radical polymerizable resin or compound (B) other than the propenyl group-containing resin (A); and a curing accelerator (C), wherein the radical polymerizable resin or compound (B) includes at least one selected from the group consisting of a maleimide group and a citraconimide group. In the formula (1), —* represents a bonding hand.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 20, 2022
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takahito SEKIDO, Masashi OKANIWA, Genki SUGIYAMA, Kentaro TAKANO, Tsuyoshi KIDA
  • Publication number: 20210277221
    Abstract: A resin composition that has excellent flux activity, flexibility and storage stability and that is suitable for a pre-applied underfill material is provided. The resin composition contains a compound (A) having a phenolic hydroxy group, a metal ion trapping agent (B) and a radical polymerizable compound (C).
    Type: Application
    Filed: April 24, 2019
    Publication date: September 9, 2021
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi OKANIWA, Takenori TAKIGUCHI, Kohei HIGASHIGUCHI, Tsuyoshi KIDA
  • Patent number: 11053382
    Abstract: The present invention provides a resin composition containing a maleimide compound (A), and at least one selected from the group consisting of an organic compound (B) having an acidic site and an organic compound (C) having an acid anhydride site.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: July 6, 2021
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takenori Takiguchi, Kohei Higashiguchi, Tsuyoshi Kida
  • Publication number: 20210147629
    Abstract: A resin composition that has both excellent flux activity and high insulation reliability, that possesses good storage stability, and that further has flexibility with good operability upon being used as a laminate is provided. The resin composition contains a chelating flux agent (A), a thermal radical polymerization initiator (B) and a radical polymerizable compound (C).
    Type: Application
    Filed: April 24, 2019
    Publication date: May 20, 2021
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Masashi OKANIWA, Takenori TAKIGUCHI, Kohei HIGASHIGUCHI, Tsuyoshi KIDA
  • Publication number: 20210147680
    Abstract: A resin composition that has excellent adhesiveness to chips and substrates such as printed wiring boards and excellent flux activity is provided. The present application provides a resin composition containing: a benzoxazine compound (A); an organic compound (B) having a flux function; and at least one thermosetting component (C) selected from a phenolic resin and a radical polymerizable thermosetting resin, wherein the radical polymerizable thermosetting resin is a resin or a compound having at least one or more functional groups selected from the group consisting of an alkenyl group, a maleimide group and a (meth)acryloyl group, and wherein a mass ratio between the benzoxazine compound (A) and the thermosetting component (C) ((A)/(C)) is 20/80 to 90/10.
    Type: Application
    Filed: April 24, 2019
    Publication date: May 20, 2021
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Kohei HIGASHIGUCHI, Takenori TAKIGUCHI, Masashi OKANIWA, Tsuyoshi KIDA
  • Patent number: 10808103
    Abstract: The present invention provides a resin composition for an underfill material, comprising a maleimide compound (A) and a secondary monoamino compound (B), wherein the secondary monoamino compound (B) has a boiling point of 120° C. or more.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: October 20, 2020
    Assignee: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takenori Takiguchi, Kohei Higashiguchi, Tsuyoshi Kida
  • Publication number: 20190300678
    Abstract: The present invention provides a resin composition for an underfill material, comprising a maleimide compound (A) and a secondary monoamino compound (B), wherein the secondary monoamino compound (B) has a boiling point of 120° C. or more.
    Type: Application
    Filed: May 29, 2017
    Publication date: October 3, 2019
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takenori TAKIGUCHI, Kohei HIGASHIGUCHI, Tsuyoshi KIDA
  • Publication number: 20190276657
    Abstract: The present invention provides a resin composition containing a maleimide compound (A), and at least one selected from the group consisting of an organic compound (B) having an acidic site and an organic compound (C) having an acid anhydride site.
    Type: Application
    Filed: May 29, 2017
    Publication date: September 12, 2019
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Takenori TAKIGUCHI, Kohei HIGASHIGUCHI, Tsuyoshi KIDA
  • Patent number: 10347552
    Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: July 9, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Ryuichi Oikawa, Toshihiko Ochiai, Shuuichi Kariyazaki, Yuji Kayashima, Tsuyoshi Kida
  • Patent number: 10312199
    Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: June 4, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
  • Patent number: 10141273
    Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: November 27, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
  • Publication number: 20180226362
    Abstract: A manufacturing method of a semiconductor device includes preparing a wiring substrate including a first surface, a plurality of first terminals formed on the first surface, and a second surface opposite to the first surface, arranging a first adhesive on the first surface of the wiring substrate, and after the arranging of the first adhesive, mounting a first semiconductor chip, which includes a first front surface, a plurality of first front electrodes formed on the first front surface, a first rear surface opposite to the first front surface, a plurality of first rear electrodes formed on the first rear surface, and a plurality of through electrodes electrically connecting the plurality of first front electrodes to the plurality of first rear electrodes, on the first surface of the wiring substrate via the first adhesive.
    Type: Application
    Filed: March 30, 2018
    Publication date: August 9, 2018
    Inventors: Shinji Watanabe, Tsuyoshi Kida, Yoshihiro Ono, Kentaro Mori, Kenji Sakata, Yusuke Yamada
  • Publication number: 20180151460
    Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.
    Type: Application
    Filed: January 25, 2018
    Publication date: May 31, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Ryuichi OIKAWA, Toshihiko OCHIAI, Shuuichi KARIYAZAKI, Yuji KAYASHIMA, Tsuyoshi KIDA
  • Patent number: 9917026
    Abstract: A semiconductor device includes first and second semiconductor components mounted on an interposer mounted on a wiring substrate, and electrically connected to each other via the interposer. Also, a plurality of wiring layers of the interposer include first, second and third wiring layers which are stacked in order from a main surface side to be a reference. In addition, in a first region of the interposer sandwiched between the first semiconductor component and the second semiconductor component, a ratio of a reference potential wiring in the third wiring layer is higher than a ratio of a reference potential wiring in the first wiring layer. Further, in the first region, a ratio of a signal wiring in the first wiring layer is higher than a ratio of a signal wiring in the third wiring layer.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: March 13, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Ryuichi Oikawa, Toshihiko Ochiai, Shuuichi Kariyazaki, Yuji Kayashima, Tsuyoshi Kida
  • Patent number: 9905529
    Abstract: A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: February 27, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kenji Sakata, Tsuyoshi Kida, Yoshihiro Ono