Patents by Inventor Tsuyoshi Koga

Tsuyoshi Koga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978872
    Abstract: A temperature measurement device includes a heat transfer member including a temperature measuring portion having a flat shape and extending laterally and a heat transfer portion that extends continuously from the temperature measuring portion and transfers heat of the temperature measuring portion, a clamping member that generates a clamping force with the temperature measuring portion, a temperature sensor that is fixed while being in contact with the heat transfer portion, and a resin member that covers and holds the heat transfer portion and the temperature sensor.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: May 7, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tsuyoshi Koga, Masaya Murase
  • Patent number: 11954960
    Abstract: A storage stores money. An outlet can receive money delivered from the storage therein. The outlet is configured to allow the money to be removed from the inside of the outlet. A detector detects a removal action associated with removal of money from the outlet. The controller switches a process on money remaining in the outlet based on a detection result of the detector.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: April 9, 2024
    Assignee: GLORY LTD.
    Inventors: Tsuyoshi Izumida, Shinsuke Shibata, Fumiaki Koga
  • Publication number: 20220407134
    Abstract: A temperature measurement device includes a heat transfer member including a temperature measuring portion having a flat shape and extending laterally and a heat transfer portion that extends continuously from the temperature measuring portion and transfers heat of the temperature measuring portion, a clamping member that generates a clamping force with the temperature measuring portion, a temperature sensor that is fixed while being in contact with the heat transfer portion, and a resin member that covers and holds the heat transfer portion and the temperature sensor.
    Type: Application
    Filed: April 5, 2022
    Publication date: December 22, 2022
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tsuyoshi Koga, Masaya Murase
  • Patent number: 11323008
    Abstract: A magnetic bearing controller for controlling a magnetic levitation motor, the magnetic levitation motor including: a rotor; a pair of electromagnets that causes the rotor to levitate by electromagnetic force; an auxiliary bearing that supports a rotating shaft of the rotor when the rotor is stopped; and a rotor position detector that detects the rotor's position in a levitation direction. The magnetic bearing controller includes an operation current generator that generates an operation current value corresponding to a deviation between a position command value and the rotor's position detected by the rotor position detector. The operation current generator is configured to give a predetermined initial value greater than 0 to the operation current value at a start of levitation for causing the rotor in a state where the rotating shaft of the rotor is supported by the auxiliary bearing to levitate and be positioned at a predetermined target position.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: May 3, 2022
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Soichiro Takemura, Kazuma Tokuyama, Tsuyoshi Koga, Yuki Seki, Suguru Takata
  • Patent number: 11260719
    Abstract: A battery cooling system includes a cooling water circulation circuit for circulating cooling water for cooling the battery, a first heat exchanger for exchanging heat between air and cooling water, a second heat exchanger for exchanging heat between the low-pressure refrigerant of the refrigeration cycle circuit and cooling water, and an ion exchanger for removing impurity ions contained in the cooling water. The first heat exchanger and the second heat exchanger are arranged in series in the cooling water circulation circuit. The ion exchanger is disposed on the downstream side of the second heat exchanger in the cooling water circulation circuit.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: March 1, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Mitsuaki Tomita, Tsuyoshi Koga, Yusuke Suzuki, Masaya Kaji
  • Patent number: 11259406
    Abstract: A flexible connector comprises a first plurality of pads disposed within an integrated circuit (IC) area, a second plurality of pads disposed in the IC area, and a plurality of through holes disposed in the IC area. The flexible connector further comprises first wiring coupled to the plurality of through holes and the first plurality of pads, and a rigidity element at least partially disposed between the plurality of through holes and the second plurality of pads.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: February 22, 2022
    Assignee: Synaptics Incorporated
    Inventors: Shinya Suzuki, Naoyuki Narita, Tsuyoshi Koga, Yuichi Nakagomi
  • Publication number: 20210273521
    Abstract: A magnetic bearing controller for controlling a magnetic levitation motor, the magnetic levitation motor including: a rotor; a pair of electromagnets that causes the rotor to levitate by electromagnetic force; an auxiliary bearing that supports a rotating shaft of the rotor when the rotor is stopped; and a rotor position detector that detects the rotor's position in a levitation direction. The magnetic bearing controller includes an operation current generator that generates an operation current value corresponding to a deviation between a position command value and the rotor's position detected by the rotor position detector. The operation current generator is configured to give a predetermined initial value greater than 0 to the operation current value at a start of levitation for causing the rotor in a state where the rotating shaft of the rotor is supported by the auxiliary bearing to levitate and be positioned at a predetermined target position.
    Type: Application
    Filed: April 1, 2019
    Publication date: September 2, 2021
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Soichiro TAKEMURA, Kazuma TOKUYAMA, Tsuyoshi KOGA, Yuki SEKI, Suguru TAKATA
  • Patent number: 10991668
    Abstract: A semiconductor device comprises a semiconductor substrate, a connection pad, and a bump. The connection pad is connected to the bump and disposed between the semiconductor substrate and the bump. The connection pad has one or more slits.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 27, 2021
    Assignee: Synaptics Incorporated
    Inventors: Tsuyoshi Koga, Shinya Suzuki, Naoki Hasegawa, Naoyuki Narita, Kiyotaka Miwa, Kazuhiko Sato, Yuichi Nakagomi
  • Publication number: 20200215871
    Abstract: The battery cooling system cools a battery mounted on the vehicle. The battery cooling system includes a cooling water circulation circuit for circulating cooling water for cooling the battery, a first heat exchanger for exchanging heat between air and cooling water, a second heat exchanger for exchanging heat between the low-pressure refrigerant of the refrigeration cycle circuit and cooling water, and an ion exchanger for removing impurity ions contained in the cooling water. The first heat exchanger and the second heat exchanger are arranged in series with the cooling water circulation circuit. The ion exchanger is disposed on the downstream side of the second heat exchanger in the cooling water circulation circuit.
    Type: Application
    Filed: December 18, 2019
    Publication date: July 9, 2020
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Mitsuaki TOMITA, Tsuyoshi KOGA, Yusuke SUZUKI, Masaya KAJI
  • Publication number: 20200163208
    Abstract: A flexible connector comprises a first plurality of pads disposed within an integrated circuit (IC) area, a second plurality of pads disposed in the IC area, and a plurality of through holes disposed in the IC area. The flexible connector further comprises first wiring coupled to the plurality of through holes and the first plurality of pads, and a rigidity element at least partially disposed between the plurality of through holes and the second plurality of pads.
    Type: Application
    Filed: November 20, 2019
    Publication date: May 21, 2020
    Inventors: Shinya SUZUKI, Naoyuki NARITA, Tsuyoshi KOGA, Yuichi NAKAGOMI
  • Publication number: 20140291993
    Abstract: A method for stably operating a lean fuel intake gas turbine engine by controlling the rotation speed of the lean fuel intake gas turbine engine for which it is difficult to control the rotation speed by controlling a fuel flow rate, is provided. In a method for operating a lean fuel intake gas turbine engine (GT) configured to use, as a fuel, a combustible component contained in a low-concentration methane gas to drive a power generator, a power converter (17) is provided between an external electric power system (19) and the power generator (11), and a rotation speed of the power generator (11) is controlled by the power converter (17), to control a rotation speed of the gas turbine engine (GT).
    Type: Application
    Filed: June 18, 2014
    Publication date: October 2, 2014
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Kazuya MATSUO, Takehiro YOSHIHARA, Tsuyoshi KOGA, Tomoyuki KOMAI, Yoshihiro YAMASAKI, Shinichi KAJITA
  • Patent number: 8524510
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: September 3, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Publication number: 20120122246
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Application
    Filed: January 18, 2012
    Publication date: May 17, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Kazuyuki MISUMI, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Patent number: 8124425
    Abstract: A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 ?m or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: February 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Misumi, Masahiro Shimizu, Tsuyoshi Koga, Tatsuhiko Akiyama, Tomohiro Murakami
  • Publication number: 20110175231
    Abstract: A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
    Type: Application
    Filed: March 30, 2011
    Publication date: July 21, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Tsutomu OKAZAKI, Motoi ASHIDA, Hiroji OZAKI, Tsuyoshi KOGA, Daisuke OKADA
  • Patent number: 7939448
    Abstract: A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: May 10, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tsutomu Okazaki, Motoi Ashida, Hiroji Ozaki, Tsuyoshi Koga, Daisuke Okada
  • Publication number: 20110049454
    Abstract: In a phase-change memory, an interface layer is inserted between a chalcogenide material layer and a plug. The interface layer is arranged so as not to cover the entire interface of a plug-like electrode. When the plug is formed at an upper part than the chalcogenide layer, the degree of integration is increased. The interface layer is formed by carrying out sputtering using an oxide target, or, by forming a metal film by carrying out sputtering using a metal target followed by oxidizing the metal film in an oxidation atmosphere such as oxygen radical, oxygen plasma, etc.
    Type: Application
    Filed: June 23, 2006
    Publication date: March 3, 2011
    Inventors: Motoyasu Terao, Yuichi Matsui, Tsuyoshi Koga, Nozomu Matsuzaki, Norikatsu Takaura, Yoshihisa Fujisaki, Kenzo Kurotsuchi, Takahiro Morikawa, Yoshitaka Sasago, Junko Ushiyama, Akemi Hirotsune
  • Publication number: 20110014783
    Abstract: A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
    Type: Application
    Filed: September 23, 2010
    Publication date: January 20, 2011
    Applicant: Renesas Electronics Corporation
    Inventors: Tsutomu OKAZAKI, Motoi Ashida, Hiroji Ozaki, Tsuyoshi Koga, Daisuke Okada
  • Patent number: 7816207
    Abstract: A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: October 19, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Tsutomu Okazaki, Motoi Ashida, Hiroji Ozaki, Tsuyoshi Koga, Daisuke Okada
  • Publication number: 20100159687
    Abstract: A manufacturing method of a semiconductor device includes a first electrode formation step of forming a control gate electrode above a surface of a semiconductor substrate with a control gate insulating film interposed between the control gate electrode and the semiconductor substrate, a step of forming a storage node insulating film on the surface of the semiconductor substrate, and a second electrode formation step of forming a memory gate electrode on a surface of the storage node insulating film. The second electrode formation step includes a step of forming a memory gate electrode layer on the surface of the storage node insulating film, a step of forming an auxiliary film, having an etching rate slower than that of the memory gate electrode layer, on a surface of the memory gate electrode layer, and a step of performing anisotropic etching on the memory gate electrode layer and the auxiliary film.
    Type: Application
    Filed: March 8, 2010
    Publication date: June 24, 2010
    Applicant: Renesas Technology Corp.
    Inventors: Tsutomu OKAZAKI, Motoi Ashida, Hiroji Ozaki, Tsuyoshi Koga, Daisuke Okada