Patents by Inventor Tsuyoshi Nakasendo
Tsuyoshi Nakasendo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11335372Abstract: An optical disk reproducing device includes a division element that divides a reflected light reflected and diffracted by an optical disk into a light flux in a central region and light fluxes in end regions; a photodetector that has a central light receiver that receives the light flux in the central region and at least two end light receivers that receive the light fluxes in the end regions, and outputs a light amount signal corresponding to a light amount of each of the received light fluxes; a non-linear processor that receives each of the light amount signals from the central light receiver and the end light receivers, and outputs linear signals and non-linear signals obtained by processing the light amount signals by linear and non-linear arithmetic operations; an equalization processor that receives the linear signals and the non-linear signals and outputs signals each amplified with a predetermined gain; an adder that adds the amplified signals and outputs an equalization signal; a reproduction signalType: GrantFiled: June 28, 2021Date of Patent: May 17, 2022Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tsuyoshi Nakasendo, Yoshiaki Komma
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Publication number: 20210327465Abstract: An optical disk reproducing device includes a division element that divides a reflected light reflected and diffracted by an optical disk into a light flux in a central region and light fluxes in end regions; a photodetector that has a central light receiver that receives the light flux in the central region and at least two end light receivers that receive the light fluxes in the end regions, and outputs a light amount signal corresponding to a light amount of each of the received light fluxes; a non-linear processor that receives each of the light amount signals from the central light receiver and the end light receivers, and outputs linear signals and non-linear signals obtained by processing the light amount signals by linear and non-linear arithmetic operations; an equalization processor that receives the linear signals and the non-linear signals and outputs signals each amplified with a predetermined gain; an adder that adds the amplified signals and outputs an equalization signal; a reproduction signalType: ApplicationFiled: June 28, 2021Publication date: October 21, 2021Inventors: Tsuyoshi NAKASENDO, Yoshiaki KOMMA
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Patent number: 10783923Abstract: A data coding device includes an error correction coder that converts user data into ECC data by error correction coding, a modulation coder that converts the ECC data into a series of modulated code data, a detector that detects a local concentration of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N from the series of modulated code data, a conversion determiner that judges whether to convert the series of modulated code data into another series of modulated code data, according to a concentration, detected by the detector, of the modulation marks/modulation spaces, and a modulation data converter that converts the series of modulated code data into the another series of modulated code data.Type: GrantFiled: March 6, 2019Date of Patent: September 22, 2020Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata
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Patent number: 10453490Abstract: An optical disc device includes a first error correction coding circuit that codes the recording data according to a first error correction coding format, a second error correction coding circuit that codes the recording data according to a second error correction coding format, and a recorder that converts the recording data into a recording signal and records it on an optical disc. The second error correction coding format is different in an arrangement of the recording data from the first error correction coding format. The second error correction coding format is configured to generate a second parity code with a higher degree of redundancy. The recorder records the recording data coded by the first error correction coding circuit and only the second parity code in the recording data coded by the second error correction coding circuit.Type: GrantFiled: December 18, 2018Date of Patent: October 22, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kohei Nakata, Tsuyoshi Nakasendo
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Publication number: 20190279680Abstract: A data coding device includes an error correction coder that converts user data into ECC data by error correction coding, a modulation coder that converts the ECC data into a series of modulated code data, a detector that detects a local concentration of modulation marks/modulation spaces that are shorter than or equal to a prescribed minimum run-length plus N from the series of modulated code data, a conversion determiner that judges whether to convert the series of modulated code data into another series of modulated code data, according to a concentration, detected by the detector, of the modulation marks/modulation spaces, and a modulation data converter that converts the series of modulated code data into the another series of modulated code data.Type: ApplicationFiled: March 6, 2019Publication date: September 12, 2019Inventors: Tsuyoshi NAKASENDO, Yasumori HINO, Kohei NAKATA
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Publication number: 20190189154Abstract: An optical disc device includes a first error correction coding circuit that codes the recording data according to a first error correction coding format, a second error correction coding circuit that codes the recording data according to a second error correction coding format, and a recorder that converts the recording data into a recording signal and records it on an optical disc. The second error correction coding format is different in an arrangement of the recording data from the first error correction coding format. The second error correction coding format is configured to generate a second parity code with a higher degree of redundancy. The recorder records the recording data coded by the first error correction coding circuit and only the second parity code in the recording data coded by the second error correction coding circuit.Type: ApplicationFiled: December 18, 2018Publication date: June 20, 2019Inventors: Kohei NAKATA, Tsuyoshi NAKASENDO
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Patent number: 9496985Abstract: A decoding system includes: a modulator which modulates user data by using a modulation rule which converts the user data into a modulation pattern; a regenerator which generates a regenerative signal from a signal obtained by transmitting the user data after modulation through a transmission path; a transmission path decoder which generates signals as generation signals corresponding to the modulation pattern, and calculates k (k is a positive integer) distances between the regenerative signal and the k generation signals in an interval having a length fixedly or dynamically determined; and a demodulator which calculates reliability information for each bit of the user data, and estimates each bit of the user data based on the calculated reliability information. The demodulator calculates likelihood that each bit of the user data is 1 and each bit of the user data is 0 by Formula (A), and calculates the reliability information by Formula (B).Type: GrantFiled: May 29, 2013Date of Patent: November 15, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata, Yuji Takagi
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Patent number: 9177596Abstract: A decoding device includes: an interference canceling circuit (104) which extracts, from states of 2K-number (where K is a natural number) of detected signals that are likely within a range of K bit width where an interference between bits of the digital information occurs due to predetermined frequency characteristics, most likely 2M-number (where M is a natural number) of detected signals respectively corresponding to states of 2M-number of detected signals which exist within a range of M bit width that is included in the range of K bit width; and a Viterbi decoding circuit (105) which generates a decoded signal by calculating differences between the 2M-number of detected signals extracted by the interference canceling circuit (104) and expectation signals respectively corresponding to the 2M-number of detected signals and also by selecting a transition sequence of a state of a detected signal for which the calculated difference is smallest.Type: GrantFiled: March 28, 2013Date of Patent: November 3, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Kohei Nakata, Yasumori Hino, Yuji Takagi, Tsuyoshi Nakasendo
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Patent number: 9063871Abstract: A decoding device (1) has: a reliability calculating unit (5) which calculates reliability information having a non-linear relationship with a noise distribution of a PR communication path (3) in at least part of or all of the reliability information based on characteristics of the PR communication path (3) and a predetermined modulation rule from an encoded signal that is obtained from the PR communication path (3); a reliability correcting unit (17) which corrects the reliability information calculated by a reliability calculating unit (5); and an error correction decoding unit (18) which performs error correction decoding on the reliability information corrected by the reliability correcting unit (17).Type: GrantFiled: April 1, 2013Date of Patent: June 23, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata, Yuji Takagi
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Publication number: 20140334282Abstract: A decoding device includes: an interference canceling circuit (104) which extracts, from states of 2K-number (where K is a natural number) of detected signals that are likely within a range of K bit width where an interference between bits of the digital information occurs due to predetermined frequency characteristics, most likely 2M-number (where M is a natural number) of detected signals respectively corresponding to states of 2M-number of detected signals which exist within a range of M bit width that is included in the range of K bit width; and a Viterbi decoding circuit (105) which generates a decoded signal by calculating differences between the 2M-number of detected signals extracted by the interference canceling circuit (104) and expectation signals respectively corresponding to the 2M-number of detected signals and also by selecting a transition sequence of a state of a detected signal for which the calculated difference is smallest.Type: ApplicationFiled: March 28, 2013Publication date: November 13, 2014Inventors: Kohei Nakata, Yasumori Hino, Yuji Takagi, Tsuyoshi Nakasendo
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Publication number: 20140126657Abstract: A decoding system includes: a modulator which modulates user data by using a modulation rule which converts the user data into a modulation pattern; a regenerator which generates a regenerative signal from a signal obtained by transmitting the user data after modulation through a transmission path; a transmission path decoder which generates signals as generation signals corresponding to the modulation pattern, and calculates k (k is a positive integer) distances between the regenerative signal and the k generation signals in an interval having a length fixedly or dynamically determined; and a demodulator which calculates reliability information for each bit of the user data, and estimates each bit of the user data based on the calculated reliability information. The demodulator calculates likelihood that each bit of the user data is 1 and each bit of the user data is 0 by Formula (A), and calculates the reliability information by Formula (B).Type: ApplicationFiled: May 29, 2013Publication date: May 8, 2014Applicant: Panasonic CorporationInventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata, Yuji Takagi
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Publication number: 20140053044Abstract: A decoding device (1) has: a reliability calculating unit (5) which calculates reliability information having a non-linear relationship with a noise distribution of a PR communication path (3) in at least part of or all of the reliability information based on characteristics of the PR communication path (3) and a predetermined modulation rule from an encoded signal that is obtained from the PR communication path (3); a reliability correcting unit (17) which corrects the reliability information calculated by a reliability calculating unit (5); and an error correction decoding unit (18) which performs error correction decoding on the reliability information corrected by the reliability correcting unit (17).Type: ApplicationFiled: April 1, 2013Publication date: February 20, 2014Applicant: Panasonic CorporationInventors: Tsuyoshi Nakasendo, Yasumori Hino, Kohei Nakata, Yuji Takagi
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Publication number: 20110299371Abstract: To provide an optical disk device, an optical disk control method and an integrated circuit, which are capable of writing a recordable mark by changing the reflectance ratio of a reflective film formed on concave-convex pits without using an industrial special device or a high-power laser light source. A data reproduction controller (103) sets a first rotation speed in a disk rotation speed switching unit (108) and a first laser power in a laser power switching unit (107) when reproducing the concave-convex pits. When writing the recordable mark, a mark recording controller (104) sets in the disk rotation speed switching unit (108) a second rotation speed that is slower than the first rotation speed and the lowest rotation speed at which the concave-convex pits can be reproduced, and sets a second laser power greater than the first laser power in the laser power switching unit (107) in accordance with the emission timing.Type: ApplicationFiled: December 17, 2010Publication date: December 8, 2011Inventors: Tsuyoshi Nakasendo, Masaru Yamaoka, Yuji Takagi, Makoto Usui