Patents by Inventor Tsuyoshi Oki

Tsuyoshi Oki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10351937
    Abstract: The present invention provides a high-strength steel sheet excellent in impact resistance. The high-strength steel sheet contains predetermined contents of C, Si, Mn, P, S, Al, Ti, N, and O, with the balance being iron and inevitable impurities, and has a steel sheet structure in which, in a ? thickness to ? thickness region across ¼ of a sheet thickness, 1 to 8% retained austenite is contained in volume fraction, an average aspect ratio of the retained austenite is 2.0 or less, an amount of solid-solution Mn in the retained austenite is 1.1 times an average amount of Mn or more, and TiN grains having a 0.5 ?m average grain diameter or less are contained, and a density of AlN grains with a 1 ?m grain diameter or more is 1.0 pieces/mm2 or less, wherein a maximum tensile strength is 900 MPa or more.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: July 16, 2019
    Assignee: NIPPON STEEL CORPORATION
    Inventors: Hiroyuki Kawata, Naoki Maruyama, Akinobu Murasato, Akinobu Minami, Hajime Hasegawa, Chisato Wakabayashi, Tsuyoshi Oki
  • Publication number: 20140205855
    Abstract: [Summary] The present invention provides a high-strength steel sheet excellent in impact resistance. The high-strength steel sheet contains predetermined contents of C, Si, Mn, P, S, Al, Ti, N, and O, with the balance being iron and inevitable impurities, and has a steel sheet structure in which, in a ? thickness to ? thickness region across ¼ of a sheet thickness, 1 to 8% retained austenite is contained in volume fraction, an average aspect ratio of the retained austenite is 2.0 or less, an amount of solid-solution Mn in the retained austenite is 1.1 times an average amount of Mn or more, and TiN grains having a 0.5 ?m average grain diameter or less are contained, and a density of AlN grains with a 1 ?m grain diameter or more is 1.0 pieces/mm2 or less, wherein a maximum tensile strength is 900 MPa or more.
    Type: Application
    Filed: July 27, 2012
    Publication date: July 24, 2014
    Applicant: NIPPON STEEL & SUMITOMO METAL CORPORATION
    Inventors: Hiroyuki Kawata, Naoki Maruyama, Akinobu Murasato, Akinobu Minami, Hajime Hasegawa, Chisato Wakabayashi, Tsuyoshi Oki
  • Patent number: 7586820
    Abstract: A pattern of an input sync signal is compared with sub patterns in a first sync pattern. The sub patterns in the first sync pattern are equal to the patterns of true sync signals, respectively. When the pattern of the input sync signal agrees with none of the sub patterns in the first sync pattern, the pattern of the input sync signal is compared with sub patterns in a second sync pattern. The sub patterns in the second sync pattern have temporal fluctuations with respect to the patterns of the true sync signals. Each of the sub patterns in the second sync pattern is assigned to only one of the true sync signals. It is determined that a sync signal is detected when the pattern of the input sync signal agrees with one of the sub patterns in the first and second sync patterns.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: September 8, 2009
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Tsuyoshi Oki
  • Patent number: 7193936
    Abstract: A method and apparatus for detecting information recorded as a phase-modulated wobble along a track of an optical disk, whereby a reference phase section is recorded with wobble having a predetermined reference phase and whereby respective polarities of phase integration values obtained by synchronous detection of phase-modulated unit sections following the reference phase section, in a playback wobble signal, are compared with the polarity of a reference phase integration value obtained for the reference phase section, to thereby detect respective bit states expressed by the phase-modulated unit sections.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: March 20, 2007
    Assignee: Victor Company of Japan, Ltd.
    Inventor: Tsuyoshi Oki
  • Publication number: 20060098544
    Abstract: A pattern of an input sync signal is compared with sub patterns in a first sync pattern. The sub patterns in the first sync pattern are equal to the patterns of true sync signals, respectively. When the pattern of the input sync signal agrees with none of the sub patterns in the first sync pattern, the pattern of the input sync signal is compared with sub patterns in a second sync pattern. The sub patterns in the second sync pattern have temporal fluctuations with respect to the patterns of the true sync signals. Each of the sub patterns in the second sync pattern is assigned to only one of the true sync signals. It is determined that a sync signal is detected when the pattern of the input sync signal agrees with one of the sub patterns in the first and second sync patterns.
    Type: Application
    Filed: November 2, 2005
    Publication date: May 11, 2006
    Applicant: Victor Company of Japan, Ltd.
    Inventor: Tsuyoshi Oki
  • Patent number: 7016286
    Abstract: First and second synchronous words having respective numbers of times of inversion different from each other in NRZI conversion are generated in a synchronous word generation portion, and first and second code word series data are generated by arranging code word data generated making reference to a run-length coding table after these two synchronous words. With respect to the first and second code word series data, DSV calculation results stored in two DSV calculation peak value memories corresponding to these data are compared with each other by a peak value comparison portion. Based on a comparison result, the code word series data having a smaller direct-current component generated in NRZI conversion is selected.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: March 21, 2006
    Assignee: Victor Company of Japan, Limited
    Inventors: Atsushi Hayami, Tsuyoshi Oki, Toshio Kuroiwa
  • Patent number: 6963296
    Abstract: There is disclosed a recording method for performing a DSV control while recording a recording signal generated by inserting a synchronous signal for decoding reproduction data into every predetermined number of code words in a code word string satisfying a predetermined run length restriction rule and to be outputted into a recording medium, when a plurality of coding tables are used to convert an input data word of p-bits to a code word of q-bits (q>p), and the code word string obtained by directly coupling the code words is recorded and reproduced in a recording medium such as an optical disk and magnetic disk, or transmitted via a transmitting portion, wherein the p-bits are 8 bits, the q-bits are 15 bits, and the predetermined run length restriction rule stipulates that a minimum run length of the signal obtained by NRZI-converting the code word excluding the synchronous signal is 3T, and a maximum run length is any one of 11T, 12T, 13T, and 14T.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: November 8, 2005
    Assignee: Victor Company of Japan, Limited
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Patent number: 6898166
    Abstract: There is disclosed a synchronous signal generating method, recording apparatus, transmitting apparatus, recording medium and transmission medium in which a plurality of coding tables is used to convert an input data word of p-bits to a code word of q-bits (q>p), and a code word string obtained by directly coupling the code words is recorded and reproduced in a recording medium such as an optical disk and magnetic disk, or transmitted via a transmitting portion. A synchronous frame consists of a synchronous signal and the cord word string satisfying restriction on minimum run length and maximum run length.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: May 24, 2005
    Assignee: Victor Company of Japan, Limited
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Patent number: 6819724
    Abstract: A data estimating circuit outputs estimation data which estimates input data at a time earlier by a predetermined bit cycle than the input data based on decoded data series outputted from a path memory. A target value computing circuit corrects the target value with a difference between the estimation data and input data as a target value error and outputs obtained plural first target values to a branchmetric operating circuit as plural target values. Because the branchmetric operating circuit can conduct branchmetric operation based on plural first target values near plural averages having the highest incidence (having peaks in histogram), decoding performance can be improved more as compared to using fixed target values.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: November 16, 2004
    Assignee: Victor Company of Japan, Limited
    Inventors: Atsushi Hayami, Tsuyoshi Oki
  • Publication number: 20040202079
    Abstract: A method and apparatus for detecting information recorded as a phase-modulated wobble along a track of an optical disk, whereby a reference phase section is recorded with wobble having a predetermined reference phase and whereby respective polarities of phase integration values obtained by synchronous detection of phase-modulated unit sections following the reference phase section, in a playback wobble signal, are compared with the polarity of a reference phase integration value obtained for the reference phase section, to thereby detect respective bit states expressed by the phase-modulated unit sections.
    Type: Application
    Filed: April 12, 2004
    Publication date: October 14, 2004
    Inventor: Tsuyoshi Oki
  • Patent number: 6653952
    Abstract: There is disclosed a modulation method in which a four bit unit of a plurality of continuous input data words is encoded into a six bit unit of a plurality of continuous output code words by referring to a plurality of coding tables including output code words corresponding to input data words, and coding table designation information in which a coding table for use in encoding the next input data word is designated. The plurality of coding tables includes at least a first coding table and a second coding table, and first and second signals respectively obtained by subjecting a first output code word of said first coding table corresponding to a predetermined input data word and a second output code word of said second coding table corresponding to said predetermined input data word to NRZI modulation are reverse to each other in polarity. Further, in particular, two redundant bits are inserted into the plurality of continuous output code words for each predetermined number of corresponding data words.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: November 25, 2003
    Assignee: Victor Company of Japan, Limited
    Inventors: Atsushi Hayami, Toshio Kuroiwa, Tsuyoshi Oki
  • Publication number: 20030002184
    Abstract: First and second synchronous words having respective numbers of times of inversion different from each other in NRZI conversion are generated in a synchronous word generation portion, and first and second code word series data are generated by arranging code word data generated making reference to a run-length coding table after these two synchronous words. With respect to the first and second code word series data, DSV calculation results stored in two DSV calculation peak value memories corresponding to these data are compared with each other by a peak value comparison portion. Based on a comparison result, the code word series data having a smaller direct-current component generated in NRZI conversion is selected.
    Type: Application
    Filed: June 25, 2002
    Publication date: January 2, 2003
    Inventors: Atsushi Hayami, Tsuyoshi Oki, Toshio Kuroiwa
  • Publication number: 20020186153
    Abstract: There is disclosed a modulation method in which a four bits unit of a plurality of continuous input data words is encoded into a six bits unit of a plurality of continuous output code words by referring to a plurality of coding tables including output code words corresponding to input data words, and coding table designation information in which an coding table for use in encoding the next input data word is designated. Further, in particular, two redundant bits are inserted into each predetermined number of data words of the plurality of continuous output code words. Even with such redundant bits, a DSV control is possible, k satisfies 9 in a (1, k) RLL rule, and a repetition frequency of a minimum run is limited.
    Type: Application
    Filed: June 4, 2002
    Publication date: December 12, 2002
    Inventors: Atsushi Hayami, Toshio Kuroiwa, Tsuyoshi Oki
  • Patent number: 6492920
    Abstract: A coding table portion includes six coding tables each storing a code word and status information indicating a coding table for use in modulating a next input data word in order to obtain a next code word which satisfies a predetermined run length restriction rule even if the next code word is coupled directly with the preceding code word, corresponding to each input data word. In the coding table portion, the code words and status informations allocated corresponding to input data words of a number set up preliminarily in succession from the highest appearance frequency to a lower one in one or more coding tables of the plural coding tables are replaced with code words having smaller RDSs and status informations allocated corresponding to other input data words in the same coding table. Consequently, the input data word is modulated using the six coding tables.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: December 10, 2002
    Assignee: Victor Company of Japan, Limited
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Publication number: 20020110071
    Abstract: There is disclosed a recording method for performing a DSV control while recording a recording signal generated by inserting a synchronous signal for decoding reproduction data into every predetermined number of code words in a code word string satisfying a predetermined run length restriction rule and to be outputted into a recording medium, when a plurality of coding tables are used to convert an input data word of p-bits to a code word of q-bits (q>p), and the code word string obtained by directly coupling the code words is recorded and reproduced in a recording medium such as an optical disk and magnetic disk, or transmitted via a transmitting portion, wherein the p-bits are 8 bits, the q-bits are 15 bits, and the predetermined run length restriction rule stipulates that a minimum run length of the signal obtained by NRZI-converting the code word excluding the synchronous signal is 3T, and a maximum run length is any one of 11T, 12T, 13T, and 14T.
    Type: Application
    Filed: February 12, 2002
    Publication date: August 15, 2002
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Publication number: 20020105885
    Abstract: There is disclosed a synchronous signal generating method, recording apparatus, transmitting apparatus, recording medium and transmission medium in which a plurality of coding tables is used to convert an input data word of p-bits to a code word of q-bits (q>p), and a code word string obtained by directly coupling the code words is recorded and reproduced in a recording medium such as an optical disk and magnetic disk, or transmitted via a transmitting portion. A synchronous frame consists of a synchronous signal and the cord word string satisfying restriction on minimum run length and maximum run length.
    Type: Application
    Filed: January 25, 2002
    Publication date: August 8, 2002
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Publication number: 20020050935
    Abstract: A coding table portion includes six coding tables each storing a code word and status information indicating a coding table for use in modulating a next input data word in order to obtain a next code word which satisfies a predetermined run length restriction rule even if the next code word is coupled directly with the preceding code word, corresponding to each input data word. In the coding table portion, the code words and status informations allocated corresponding to input data words of a number set up preliminarily in succession from the highest appearance frequency to a lower one in one or more coding tables of the plural coding tables are replaced with code words having smaller RDSs and status informations allocated corresponding to other input data words in the same coding table. Consequently, the input data word is modulated using the six coding tables.
    Type: Application
    Filed: October 26, 2001
    Publication date: May 2, 2002
    Inventors: Tsuyoshi Oki, Atsushi Hayami
  • Publication number: 20020013927
    Abstract: A data estimating circuit outputs estimation data which estimates input data at a time earlier by a predetermined bit cycle than the input data based on decoded data series outputted from a path memory. A target value computing circuit corrects the target value with a difference between the estimation data and input data as a target value error and outputs obtained plural first target values to a branchmetric operating circuit as plural target values. Because the branchmetric operating circuit can conduct branchmetric operation based on plural first target values near plural averages having the highest incidence (having peaks in histogram), decoding performance can be improved more as compared to using fixed target values.
    Type: Application
    Filed: December 18, 2000
    Publication date: January 31, 2002
    Inventors: Atsushi Hayami, Tsuyoshi Oki