Patents by Inventor Tsuyoshi Oota
Tsuyoshi Oota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10566464Abstract: A semiconductor device includes a semiconductor layer located between first and second electrodes. The contact location of the semiconductor layer with the first electrode forms a first contact plane. The semiconductor layer includes a first-conductivity-type first semiconductor region in contact with the first electrode, a second-conductivity-type second semiconductor region located between the first electrode and the first semiconductor region and contacting the first electrode, a second-conductivity-type third semiconductor region located between the first electrode and the second semiconductor region and contacting the first electrode and having a higher impurity concentration than that of the second semiconductor region, and a second-conductivity-type fourth semiconductor region located between the first electrode and the first semiconductor region and contacting the first electrode.Type: GrantFiled: August 22, 2016Date of Patent: February 18, 2020Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tsuyoshi Oota, Yoichi Hori
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Patent number: 10438946Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a gate electrode, and a second electrode. The first semiconductor region is provided on the first electrode. The first semiconductor region includes first portions and first protruding portions. The first portions are arranged along a first direction and a second direction perpendicular to the first direction. The first protruding portions respectively protrude from the first portions. The second semiconductor regions are spaced from each other and provided in the first semiconductor region. The third semiconductor region is provided on the first semiconductor region and the second semiconductor regions.Type: GrantFiled: August 30, 2017Date of Patent: October 8, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Oota, Hiroko Nonaka, Asami Gorohmaru, Toshiyuki Naka, Norio Yasuhara
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Patent number: 10439038Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a gate electrode, and a second electrode. The first semiconductor region is provided on the first electrode. The first semiconductor region includes first portions and first protruding portions. The first portions are arranged along a first direction and a second direction perpendicular to the first direction. The first protruding portions respectively protrude from the first portions. The second semiconductor regions are spaced from each other and provided in the first semiconductor region. The third semiconductor region is provided on the first semiconductor region and the second semiconductor regions.Type: GrantFiled: March 9, 2018Date of Patent: October 8, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Tsuyoshi Oota, Hiroko Nonaka, Asami Gorohmaru, Toshiyuki Naka, Norio Yasuhara
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Publication number: 20180226397Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a gate electrode, and a second electrode. The first semiconductor region is provided on the first electrode. The first semiconductor region includes first portions and first protruding portions. The first portions are arranged along a first direction and a second direction perpendicular to the first direction. The first protruding portions respectively protrude from the first portions. The second semiconductor regions are spaced from each other and provided in the first semiconductor region. The third semiconductor region is provided on the first semiconductor region and the second semiconductor regions.Type: ApplicationFiled: August 30, 2017Publication date: August 9, 2018Inventors: Tsuyoshi Oota, Hiroko Nonaka, Asami Gorohmaru, Toshiyuki Naka, Norio Yasuhara
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Publication number: 20180226487Abstract: According to an embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, a gate electrode, and a second electrode. The first semiconductor region is provided on the first electrode. The first semiconductor region includes first portions and first protruding portions. The first portions are arranged along a first direction and a second direction perpendicular to the first direction. The first protruding portions respectively protrude from the first portions. The second semiconductor regions are spaced from each other and provided in the first semiconductor region. The third semiconductor region is provided on the first semiconductor region and the second semiconductor regions.Type: ApplicationFiled: March 9, 2018Publication date: August 9, 2018Inventors: Tsuyoshi Oota, Hiroko Nonaka, Asami Gorohmaru, Toshiyuki Naka, Norio Yasuhara
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Patent number: 9887285Abstract: A semiconductor device comprises a silicon carbide layer, a first electrode, a second electrode, and a gate. The silicon carbide layer has first region of first conductivity type between the first and second electrodes and also the gate and second electrode. A second region of the first type is between the first electrode and the first region. A third region of second conductivity type is between the first electrode and the second region. A fourth region of the first type is between the first electrode and the third region. A fifth region of the first type is between the gate and the second region. The third region is between the fourth and fifth regions. A sixth region of the first type contacts the first electrode and is between the second region and this electrode. An insulation layer is between the gate and the third region and also the fifth region.Type: GrantFiled: February 27, 2017Date of Patent: February 6, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Oota, Masaru Furukawa
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Publication number: 20170271528Abstract: A semiconductor device includes a semiconductor layer located between first and second electrodes. The contact location of the semiconductor layer with the first electrode forms a first contact plane. The semiconductor layer includes a first-conductivity-type first semiconductor region in contact with the first electrode, a second-conductivity-type second semiconductor region located between the first electrode and the first semiconductor region and contacting the first electrode, a second-conductivity-type third semiconductor region located between the first electrode and the second semiconductor region and contacting the first electrode and having a higher impurity concentration than that of the second semiconductor region, and a second-conductivity-type fourth semiconductor region located between the first electrode and the first semiconductor region and contacting the first electrode.Type: ApplicationFiled: August 22, 2016Publication date: September 21, 2017Inventors: Tsuyoshi OOTA, Yoichi HORI
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Patent number: 9748342Abstract: A semiconductor device according to an embodiment includes a first-conductivity-type SiC substrate, a first-conductivity-type SiC layer provided on the SiC substrate, having a first surface, and having a lower first-conductivity-type impurity concentration than the SiC substrate, first second-conductivity-type SiC regions provided in the first surface of the SiC layer, second second-conductivity-type SiC regions provided in the first SiC regions and having a higher second-conductivity-type impurity concentration than the first SiC region, silicide layers provided on the second SiC regions and having a second surface, a difference between a distance from the SiC substrate to the second surface and a distance from the SiC substrate to the first surface being equal to or less than 0.2 ?m, a first electrode provided to contact with the SiC layer and the silicide layers, and a second electrode provided to contact with the SiC substrate.Type: GrantFiled: September 15, 2015Date of Patent: August 29, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Oota, Yoichi Hori, Atsuko Yamashita
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Publication number: 20170077236Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface.Type: ApplicationFiled: March 7, 2016Publication date: March 16, 2017Inventors: Yoichi HORI, Tsuyoshi OOTA, Hiroshi KONO, Atsuko YAMASHITA
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Patent number: 9577046Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface, a first electrode on the first surface, a second electrode on the second surface, a first semiconductor region of a first conductivity type in the semiconductor layer, a second semiconductor region of a second conductivity type in an element region of the semiconductor layer between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the second semiconductor region and the first electrode, and a fourth semiconductor region of the second conductivity type in a termination region of the semiconductor layer inwardly of the first surface. A distance between the fourth semiconductor region and the second surface is greater than a distance between the second semiconductor region and the second surface.Type: GrantFiled: March 7, 2016Date of Patent: February 21, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Hori, Tsuyoshi Oota, Hiroshi Kono, Atsuko Yamashita
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Publication number: 20160276442Abstract: A semiconductor device according to an embodiment includes a first-conductivity-type SiC substrate, a first-conductivity-type SiC layer provided on the SiC substrate, having a first surface, and having a lower first-conductivity-type impurity concentration than the SiC substrate, first second-conductivity-type SiC regions provided in the first surface of the SiC layer, second second-conductivity-type SiC regions provided in the first SiC regions and having a higher second-conductivity-type impurity concentration than the first SiC region, silicide layers provided on the second SiC regions and having a second surface, a difference between a distance from the SiC substrate to the second surface and a distance from the SiC substrate to the first surface being equal to or less than 0.2 ?m, a first electrode provided to contact with the SiC layer and the silicide layers, and a second electrode provided to contact with the SiC substrate.Type: ApplicationFiled: September 15, 2015Publication date: September 22, 2016Inventors: Tsuyoshi Oota, Yoichi Hori, Atsuko Yamashita
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Patent number: 9385243Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.Type: GrantFiled: September 2, 2014Date of Patent: July 5, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yoichi Hori, Takao Noda, Tsuyoshi Oota
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Patent number: 6992351Abstract: A first transistor has a first main electrode region which is formed so that these are subdivided into a plurality of first isolated island region. A second transistor has its first main electrode region which are divided into a plurality of second isolated island regions in close proximity to the array of first island regions.Type: GrantFiled: June 28, 2004Date of Patent: January 31, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Hirobumi Matsuki, Tsuyoshi Oota, Yuji Hiyama
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Publication number: 20050224887Abstract: A first transistor has a first main electrode region which is formed so that these are subdivided into a plurality of first isolated island region. A second transistor has its first main electrode region which are divided into a plurality of second isolated island regions in close proximity to the array of first island regions.Type: ApplicationFiled: June 28, 2004Publication date: October 13, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hirobumi Matsuki, Tsuyoshi Oota, Yuji Hiyama
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Patent number: 6940128Abstract: A first transistor has a first main electrode region which is formed so that these are subdivided into a plurality of first isolated island region. A second transistor has its first main electrode region which are divided into a plurality of second isolated island regions in close proximity to the array of first island regions.Type: GrantFiled: June 28, 2004Date of Patent: September 6, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Hirobumi Matsuki, Tsuyoshi Oota, Yuji Hiyama