Patents by Inventor Tsuyoshi OSAGA
Tsuyoshi OSAGA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11876062Abstract: The present invention relates to a semiconductor device. The semiconductor device includes: a first main electrode provided on an active region; a second main electrode provided on an opposite side of the semiconductor substrate from the first main electrode; a protection film covering a terminal region; and a non-electrolytic plating layer provided on the first main electrode not covered by the protection film, the first main electrode includes a center electrode in a center part and an outer peripheral electrode provided along the center electrode to be separately from the center electrode, the protection film is provided to extend from the terminal region to an end edge portion of the outer peripheral electrode, the center electrode and the outer peripheral electrode include: a first metal layer; and a second metal layer provided on the first metal layer, and the outer peripheral electrode includes a hole part to reach the first metal layer.Type: GrantFiled: October 8, 2019Date of Patent: January 16, 2024Assignee: Mitsubishi Electric CorporationInventor: Tsuyoshi Osaga
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Publication number: 20240014206Abstract: An IGBT region (2) and a diode region (3) are provided on a semiconductor substrate (1) and have an emitter electrode (16) on a surface of the semiconductor substrate (1). A sense IGBT region (4) is provided on the semiconductor substrate (1), has a smaller area than that of the IGBT region (2), and includes a sense emitter electrode (20) provided on the surface of the semiconductor substrate (1) and separated from the emitter electrode (16). A sense diode region (3) is provided on the semiconductor substrate (1), has a smaller area than that of the diode region (3), and includes a sense anode electrode provided on the surface of the semiconductor substrate (1) and separated from the emitter electrode (16). The sense diode region (3) is separated from the IGBT region (2) by a distance equal to or greater than that of the drift layer (8).Type: ApplicationFiled: April 26, 2021Publication date: January 11, 2024Applicant: Mitsubishi Electric CorporationInventors: Tsuyoshi OSAGA, Yasuo ATA, Yuki HATA
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Publication number: 20230040727Abstract: A semiconductor device includes: a semiconductor substrate; an upper surface electrode formed on an upper surface side of the semiconductor substrate; an insulating film formed on the upper surface side of the semiconductor substrate; and a lower surface electrode formed on a lower surface side of the semiconductor substrate and having a larger area than that of the upper surface electrode, wherein the upper surface electrode and the lower surface electrode are electrodes having a compressive stress.Type: ApplicationFiled: May 13, 2020Publication date: February 9, 2023Applicant: Mitsubishi Electric CorporationInventors: Yuki HATA, Tsuyoshi OSAGA, Yasuo ATA
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Publication number: 20220399291Abstract: The present invention relates to a semiconductor device. The semiconductor device includes: a first main electrode provided on an active region; a second main electrode provided on an opposite side of the semiconductor substrate from the first main electrode; a protection film covering a terminal region; and a non-electrolytic plating layer provided on the first main electrode not covered by the protection film, the first main electrode includes a center electrode in a center part and an outer peripheral electrode provided along the center electrode to be separately from the center electrode, the protection film is provided to extend from the terminal region to an end edge portion of the outer peripheral electrode, the center electrode and the outer peripheral electrode include: a first metal layer; and a second metal layer provided on the first metal layer, and the outer peripheral electrode includes a hole part to reach the first metal layer.Type: ApplicationFiled: October 8, 2019Publication date: December 15, 2022Applicant: Mitsubishi Electric CorporationInventor: Tsuyoshi OSAGA
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Publication number: 20220045018Abstract: An object is to provide a semiconductor device in which the area of inspection wiring for detecting chipping, cracks, or the like is narrowed. The semiconductor device includes a semiconductor substrate including an effective region including a semiconductor element and an ineffective region provided on a circumference of the effective region on a front surface thereof, and a rear surface electrode on a rear surface thereof; and inspection wiring provided in the ineffective region on the front surface of the semiconductor substrate so as to surround an outer periphery of the effective region. The inspection wiring is electrically connected to the rear surface electrode in such a manner that one end of the inspection wiring is in contact with the semiconductor layer which is provided in the ineffective region on the front surface of the semiconductor substrate and electrically connected to the rear surface electrode.Type: ApplicationFiled: November 20, 2018Publication date: February 10, 2022Applicant: Mitsubishi Electric CorporationInventors: Kazuya OGAWA, Tsuyoshi OSAGA
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Publication number: 20210233873Abstract: An oxide film (4) is provided on an upper surface of the semiconductor substrate (1). A guard ring (3) is provided on the upper surface of the semiconductor substrate (1). An organic insulating film (6) directly contacts the oxide film (4) in a termination region (7) between the guard ring (3) and an outer edge portion of the semiconductor substrate (1). A groove (8) is provided on the upper surface of the semiconductor substrate (1) in the termination region (7). The groove (8) is embedded with the organic insulating film (6).Type: ApplicationFiled: November 19, 2018Publication date: July 29, 2021Applicant: Mitsubishi Electric CorporationInventors: Takaki ITO, Tsuyoshi OSAGA, Kota KIMURA
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Patent number: 11069769Abstract: A semiconductor device includes, on an upper surface side of an N?-type drift layer, a P-type well layer, an N-type emitter layer, a gate insulation film, and a gate electrode, and includes, on a lower surface side of the N?-type drift layer, an N-type buffer layer, a P-type collector layer, and an N++-type layer. The N++-type layer is partially formed in the N-type buffer layer. The N++-type layer has impurity concentration being higher than impurity concentration of the N-type buffer layer and being equal to or higher than impurity concentration of the P-type collector layer.Type: GrantFiled: September 7, 2017Date of Patent: July 20, 2021Assignee: Mitsubishi Electric CorporationInventors: Tsuyoshi Osaga, Yasuo Ata
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Patent number: 10964524Abstract: A back surface of a wafer is formed with a ring-shaped projecting portion. The wafer is cut with a blade from a side of a front surface of the wafer in a state where the projecting portion of the wafer with a back surface facing upward is supported.Type: GrantFiled: April 7, 2017Date of Patent: March 30, 2021Assignee: Mitsubishi Electric CorporationInventors: Tsuyoshi Osaga, Yasuo Ata
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Publication number: 20200373382Abstract: A semiconductor device includes, on an upper surface side of an N?-type drift layer, a P-type well layer, an N-type emitter layer, a gate insulation film, and a gate electrode, and includes, on a lower surface side of the N?-type drift layer, an N-type buffer layer, a P-type collector layer, and an N++-type layer. The N++-type layer is partially formed in the N-type buffer layer. The N++-type layer has impurity concentration being higher than impurity concentration of the N-type buffer layer and being equal to or higher than impurity concentration of the P-type collector layer.Type: ApplicationFiled: September 7, 2017Publication date: November 26, 2020Applicant: Mitsubishi Electric CorporationInventors: Tsuyoshi OSAGA, Yasuo ATA
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Patent number: 10685932Abstract: A semiconductor substrate (1) has a front surface and a back surface that are opposite each other. A first metal layer (2) is formed on the front surface of the semiconductor substrate (1). A second metal layer (3) for soldering is formed on the first metal layer (2). A third metal layer (5) is formed on the back surface of the semiconductor substrate (1). A fourth metal layer (6) for soldering is formed on the third metal layer (5). The second metal layer (3) has a larger thickness than that of the fourth metal layer (6). The first, third, and fourth metal layers (2,5,6) are not divided in a pattern. The second metal layer (3) is divided in a pattern and has a plurality of metal layers electrically connected to each other via the first metal layer (2).Type: GrantFiled: June 8, 2016Date of Patent: June 16, 2020Assignee: Mitsubishi Electric CorporationInventors: Sho Suzuki, Tsuyoshi Osaga
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Publication number: 20200144215Abstract: A semiconductor substrate (1) has a front surface and a back surface that are opposite each other. A first metal layer (2) is formed on the front surface of the semiconductor substrate (1). A second metal layer (3) for soldering is formed on the first metal layer (2). A third metal layer (5) is formed on the back surface of the semiconductor substrate (1). A fourth metal layer (6) for soldering is formed on the third metal layer (5). The second metal layer (3) has a larger thickness than that of the fourth metal layer (6). The first, third, and fourth metal layers (2, 5, 6) are not divided in a pattern. The second metal layer (3) is divided in a pattern and has a plurality of metal layers electrically connected to each other via the first metal layer (2).Type: ApplicationFiled: June 8, 2016Publication date: May 7, 2020Applicant: Mitsubishi Electric CorporationInventors: Sho SUZUKI, Tsuyoshi OSAGA
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Publication number: 20200075311Abstract: A back surface of a wafer is formed with a ring-shaped projecting portion. The wafer is cut with a blade from a side of a front surface of the wafer in a state where the projecting portion of the wafer with a back surface facing upward is supported.Type: ApplicationFiled: April 7, 2017Publication date: March 5, 2020Applicant: Mitsubishi Electric CorporationInventors: Tsuyoshi OSAGA, Yasuo ATA
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Patent number: 9716052Abstract: A ground working tool comprising a tubular base body with an inner receiving space for receiving a cylindrical core of solid ground material, connector mechanism for connecting the tubular base body with a rotary drive and locking mechanism for locking the core in the receiving space of the tubular base body. The locking mechanism involves at least one locking unit having a guide rail being disposed at an inner side of the tubular base body and arranged with a deviation angle relative to a tangential direction of the tubular base body and the locking unit further comprises at least one locking element, which is moveably mounted on the guide rail between a radially outer releasing position and a radially inner locking position, in which the core is clamped within the receiving space by means of the at least one locking element.Type: GrantFiled: August 28, 2013Date of Patent: July 25, 2017Assignee: Mitsubishi Electric CorporationInventors: Tsuyoshi Osaga, Mikio Ishihara, Kazuaki Hiyama, Tatsuya Kawase
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Patent number: 9530766Abstract: A transistor (2) is provided on a semiconductor substrate (8). A temperature detection diode (4) for monitoring temperature of an upper surface of the semiconductor substrate (8) is provided on the semiconductor substrate (8). An external electrode (7) is connected in common to an emitter (E) of the transistor (2) and a cathode (K) of the temperature detection diode (4). Therefore, an external electrode for the cathode (K) of the temperature detection diode (4) can be removed, and thus the device can be reduced in size and improved in terms of ease of assembly.Type: GrantFiled: August 23, 2013Date of Patent: December 27, 2016Assignee: Mitsubishi Electric CorporationInventors: Mikio Ishihara, Kazuaki Hiyama, Tatsuya Kawase, Tsuyoshi Osaga
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Publication number: 20160141284Abstract: A transistor (2) is provided on a semiconductor substrate (8). A temperature detection diode (4) for monitoring temperature of an upper surface of the semiconductor substrate (8) is provided on the semiconductor substrate (8). An external electrode (7) is connected in common to an emitter (E) of the transistor (2) and a cathode (K) of the temperature detection diode (4). Therefore, an external electrode for the cathode (K) of the temperature detection diode (4) can be removed, and thus the device can be reduced in size and improved in terms of ease of assembly.Type: ApplicationFiled: August 23, 2013Publication date: May 19, 2016Applicant: Mitsubishi Electric CorporationInventors: Mikio ISHIHARA, Kazuaki HIYAMA, Tatsuya KAWASE, Tsuyoshi OSAGA
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Publication number: 20160126156Abstract: A ground working tool comprising a tubular base body with an inner receiving space for receiving a cylindrical core of solid ground material, connector mechanism for connecting the tubular base body with a rotary drive and locking mechanism for locking the core in the receiving space of the tubular base body. The locking mechanism involves at least one locking unit having a guide rail being disposed at an inner side of the tubular base body and arranged with a deviation angle relative to a tangential direction of the tubular base body and the locking unit further comprises at least one locking element, which is moveably mounted on the guide rail between a radially outer releasing position and a radially inner locking position, in which the core is clamped within the receiving space by means of the at least one locking element.Type: ApplicationFiled: August 28, 2013Publication date: May 5, 2016Applicant: Mitsubishi Electric CorporationInventors: Tsuyoshi OSAGA, Mikio ISHIHARA, Kazuaki HIYAMA, Tatsuya KAWASE