Patents by Inventor Tsuyoshi Shiragasawa

Tsuyoshi Shiragasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5699300
    Abstract: A semiconductor memory device comprising memory cells arranged in a matrix with plural pairs of bit lines to be column addressed and connected to sense amplifiers, and word lines to be row addressed and divided into divisional word lines. Output signals of sense amplifiers selected by the column addressing are transferred to respective data lines. The divisional word lines are time-sequentially activated corresponding to the row addressing with the activated states of any two sequential divisional word lines overlapped for a fractional time of the full activation time. The sense amplifiers are grouped into plural groups with respective common column addresses. Each group of sense amplifiers have their outputs to be applied to respective data lines connected to a serial/parallel converter.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: December 16, 1997
    Inventors: Hironori Akamatsu, Tsuyoshi Shiragasawa, Junko Matsushima, Hisakazu Kotani
  • Patent number: 4761607
    Abstract: A semiconductor device inspecting apparatus includes a signal input for an LSI device, a comparator used to compare an LSI device output with an expected value, an X-Y stage for moving the LSI device in an X direction or a Y direction, a probe for non-contact probing of the electrical state inside the LSI device, and a device for determining the probing position and for judging and executing the result, by which the defect location of the LSI device is automatically located.
    Type: Grant
    Filed: September 8, 1987
    Date of Patent: August 2, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsuyoshi Shiragasawa, Masahide Sugano, Masaharu Noyori
  • Patent number: 4736159
    Abstract: In laser probing of LSI, PICs' (photo-induced currents) are measured at the power source terminal of the LSI, under scanning of laser beam for a good LSI and a fault LSI, the measured PICs' are then superposingly displayed as red and green images, respectively; then faults of LSI are displayed as red spots in a yellow image made by superposition of green and red images.
    Type: Grant
    Filed: November 20, 1985
    Date of Patent: April 5, 1988
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsuyoshi Shiragasawa, Masaharu Noyori
  • Patent number: 4541090
    Abstract: A large capacity memory is improved so as to reduce its testing time length. Memory arrays are divided into a plural number of memory blocks having common address signal lines and common input/output lines, each memory block is provided with respective comparators thereby enabling testings of the plural number of memory blocks parallelly at the same time.
    Type: Grant
    Filed: June 1, 1982
    Date of Patent: September 10, 1985
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Tsuyoshi Shiragasawa