Abstract: A complementary metal-oxide-semiconductor device having a semiconductor region of an n conductivity type connected to a high-potential power supply, in which a p-channel MOSFET is formed, and a semiconductor region of a p conductivity type connected to a low-potential power supply, in which an n-channel MOSFET is formed, characterized in that at least one of the following two states, that is, one state in which a source of said p-channel MOSFET is connected to a lower high-potential power supply having a potential lower than that of said high-potential power supply and another state in which a source of said n-channel MOSFET is connected to a higher low-potential power supply having a potential higher than that of said low-potential power supply is realized.

Abstract: A signal delaying outputting circuit is disclosed which can prevent an excessive increase in dead time at a high temperature without requiring a large chip area. The signal delaying outputting circuit comprises a first invertor circuit driven by an input signal, and a second invertor circuit driven by an output signal of the first invertor circuit. A first auxiliary MOS FET of the same channel type as that of one of two first p- and n-channel MOS FETs of the first invertor circuit is provided in the first converter circuit in an integral continuous relationship with the one MOS FET such that they have separate gates from each other but have a common source or drain.