Patents by Inventor Tsuyoshi Tanaka

Tsuyoshi Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 7859087
    Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: December 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Tomohiro Murata, Hiroaki Ueno, Hidetoshi Ishida, Tetsuzo Ueda, Yasuhiro Uemoto, Tsuyoshi Tanaka, Daisuke Ueda
  • SEMICONDUCTOR DEVICE INCLUDING INDEPENDENT ACTIVE LAYERS AND METHOD FOR FABRICATING THE SAME
    Publication number: 20100320559
    Abstract: A semiconductor device includes a semiconductor substrate of n-type silicon including, in an upper portion thereof, a first polarity inversion region and a second polarity inversion regions spaced from each other and doped with a p-type impurity. A first HFET including a first active layer and a second HFET including a second active layer both made of a group III-V nitride semiconductor are independently formed on the respective polarity inversion regions in the semiconductor substrate, and the HFETs are electrically connected to each other through interconnects.
    Type: Application
    Filed: August 10, 2010
    Publication date: December 23, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Yutaka HIROSE, Tsuyoshi Tanaka
  • EXTERNAL DEVICE ACCESS APPARATUS, CONTROL METHOD THEREOF, AND SYSTEM LSI
    Publication number: 20100318707
    Abstract: An external device access apparatus according to the present invention includes: an address control unit that accepts a prefetch request and a prefetch data readout request from a master and performs a prefetch operation and a prefetch data readout operation; a readout data storage unit that stores data read out through the prefetch operation; a storage operation status holding unit that holds a prefetch operation status indicating whether or not the prefetch operation has been completed; and an acceptance signal generation unit that outputs, to the master, an acceptance signal indicating that the prefetch data readout request has been accepted from the master. First information indicating a status of the prefetch operation is outputted to the master based on the prefetch operation status.
    Type: Application
    Filed: August 13, 2008
    Publication date: December 16, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tsuyoshi Tanaka, Nobuo Higaki, Takasi Inoue, Yosuke Kudo, Kazushi Kurata
  • Nitride based semiconductor device with concave gate region
    Patent number: 7838904
    Abstract: In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: November 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Kazushi Nakazawa, Satoshi Nakazawa, Tetsuzo Ueda, Tsuyoshi Tanaka, Masahiro Hikita
  • Field effect transistor and method for fabricating the same
    Patent number: 7834380
    Abstract: A field effect transistor includes a first semiconductor layer made of a multilayer of a plurality of semiconductor films and a second semiconductor layer formed on the first semiconductor layer. A source electrode and a drain electrode are formed on the second semiconductor layer to be spaced from each other. An opening having an insulating film on its inner wall is formed in a portion of the second semiconductor layer sandwiched between the source electrode and the drain electrode so as to expose the first semiconductor layer therein. A gate electrode is formed in the opening to be in contact with the insulating film and the first semiconductor layer on the bottom of the opening.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: November 16, 2010
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Hidetoshi Ishida, Tsuyoshi Tanaka
  • Nitride semiconductor device
    Patent number: 7825434
    Abstract: A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: November 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Hiroaki Ueno, Manabu Yanagihara, Tetsuzo Ueda, Yasuhiro Uemoto, Tsuyoshi Tanaka, Daisuke Ueda
  • Semiconductor device and method for manufacturing the same
    Patent number: 7821030
    Abstract: A semiconductor device includes a first semiconductor layer which is formed above a substrate, a Schottky electrode and an ohmic electrode which are formed on the first semiconductor layer to be spaced from each other and a second semiconductor layer which is formed to cover the first semiconductor layer with the Schottky electrode and the ohmic electrode exposed. The second semiconductor layer has a larger band gap than that of the first semiconductor layer.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: October 26, 2010
    Assignee: Panasonic Corporation
    Inventors: Manabu Yanagihara, Kazushi Nakazawa, Tsuyoshi Tanaka
  • RECONFIGURABLE VEHICLE USER INTERFACE SYSTEM
    Publication number: 20100268426
    Abstract: A reconfigurable vehicle user interface system is presented. A vehicle user interface has a touch sensitive input devices such as touchpads and a touch screen that have specific function commands mapped to them. A user can select which function commands are mapped to which portions of the touch screen. This allows a user to customize the steering wheel function commands.
    Type: Application
    Filed: November 13, 2009
    Publication date: October 21, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Rabindra Pathak, Peter Veprek, Kem Gallione, Tsuyoshi Tanaka
  • PERFORMANCE MONITORING SYSTEM, BOTTLENECK DETECTION METHOD AND MANAGEMENT SERVER FOR VIRTUAL MACHINE SYSTEM
    Publication number: 20100268816
    Abstract: A performance monitoring system, comprising: a server; a storage system; and a management server, the management server the management server is configured to: obtain the gathered time-sequential data from the server; judge whether at least one bottleneck has occurred in the logical resource of a specified one of the plurality of virtual machines at each time of the obtained time-sequential data, judge whether at least one bottleneck causing large influence on the specified one of the plurality of virtual machines has occurred; and notify that at least one large bottleneck has occurred in the specified one of the plurality of virtual machines.
    Type: Application
    Filed: April 12, 2010
    Publication date: October 21, 2010
    Applicant: HITACHI, LTD.
    Inventors: Toshiaki TARUI, Tsuyoshi TANAKA, Kazuhiko MIZUNO, Ken NAONO
  • Field-effect transistor with nitride semiconductor and method for fabricating the same
    Patent number: 7816707
    Abstract: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: October 19, 2010
    Assignee: Panasonic Corporation
    Inventors: Masahiro Hikita, Tetsuzo Ueda, Manabu Yanagihara, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20100244045
    Abstract: A semiconductor device includes a first semiconductor layer which is formed above a substrate, a Schottky electrode and an ohmic electrode which are formed on the first semiconductor layer to be spaced from each other and a second semiconductor layer which is formed to cover the first semiconductor layer with the Schottky electrode and the ohmic electrode exposed. The second semiconductor layer has a larger band gap than that of the first semiconductor layer.
    Type: Application
    Filed: June 7, 2010
    Publication date: September 30, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Manabu YANAGIHARA, Kazushi Nakazawa, Tsuyoshi Tanaka
  • PHENYL-SUBSTITUTED 1,3.5-TRIAZINE COMPOUND, PROCESS FOR PRODUCING THE SAME, AND ORGANIC ELECTROLUMINESCENT DEVICE CONTAINING THE SAME AS COMPONENT
    Publication number: 20100249406
    Abstract: A phenyl-substituted 1,3,5-triazine compound represented by the general formula (1); wherein Ar1 and Ar2 independently represent substituted or unsubstituted phenyl, naphthyl or biphenylyl group; R1, R2 and R3 independently represent hydrogen atom or methyl group; X1 and X2 independently represent substituted or unsubstituted phenylene, naphthylene or pyridylene group; p and q independently represent an integer of 0 to 2; and Ar3 and Ar4 independently represent substituted or unsubstituted pyridyl or phenyl group. This compound is suitable for an organic electroluminescent device.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 30, 2010
    Applicants: TOSOH CORPORATION, SAGAMI CHEMICAL RESEARCH CENTER
    Inventors: Tetsu Yamakawa, Hidenori Aihara, Naoko Yanai, Tsuyoshi Tanaka, Yoko Honma, Masaru Sato
  • CIRCUIT DEVICE
    Publication number: 20100237967
    Abstract: A circuit device includes a substrate 11, and a transmission line 10. The transmission line 10 includes a dielectric film 13 formed on the substrate 11, and a signal line formed on the dielectric film 13. The dielectric film 13 includes a nano-composite film in which particles of a first material are dispersed in a second material.
    Type: Application
    Filed: July 29, 2008
    Publication date: September 23, 2010
    Inventors: Hiroaki Ueno, Hiroyuki Sakai, Tsuyoshi Tanaka, Daisuke Ueda
  • Semiconductor device including independent active layers and method for fabricating the same
    Patent number: 7800097
    Abstract: A semiconductor device includes a semiconductor substrate of n-type silicon including, in an upper portion thereof, a first polarity inversion region and a second polarity inversion regions spaced from each other and doped with a p-type impurity. A first HFET including a first active layer and a second HFET including a second active layer both made of a group III-V nitride semiconductor are independently formed on the respective polarity inversion regions in the semiconductor substrate, and the HFETs are electrically connected to each other through interconnects.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Yutaka Hirose, Tsuyoshi Tanaka
  • Hermetic sealing cap, electronic component accommodation package, and method for producing hermetic sealing cap
    Patent number: 7790988
    Abstract: A hermetic sealing cap can be provided which is capable of suppressing that a production process becomes complicated, and additionally of suppressing that a solder layer wetly spreads inward on a sealing surface. This hermetic sealing cap (1, 30) includes a base member (2), a first plating layer (3, 31) that is formed on the surface of the base member, and a second plating layer (4, 32) that is formed on the surface of the first plating layer and is less oxidized than the first plating layer, wherein a part of the second plating layer in an area (S1, S5) inside an area (S2, S6) to which an electronic component accommodation member is joined is removed so that the surface of the first plating layer is exposed, and the surface of the first plating layer that is exposed in the area from which the second plating layer is removed is oxidized.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: September 7, 2010
    Assignee: Neomax Materials Co., Ltd.
    Inventors: Tsuyoshi Tanaka, Masaharu Yamamoto
  • SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    Publication number: 20100207165
    Abstract: According to a method for fabricating a semiconductor device, a first semiconductor layer made of a first nitride semiconductor is formed over a substrate. Thereafter, a mask film covering part of the upper surface of the first semiconductor layer is selectively formed on the first semiconductor layer. A multilayer film, in which second and third nitride semiconductors having different band gaps are stacked, is selectively formed on the first semiconductor layer with the mask film used as a formation mask. On the multilayer film, an ohmic electrode is formed.
    Type: Application
    Filed: April 28, 2010
    Publication date: August 19, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tomohiro MURATA, Yutaka Hirose, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • INPUT SYSTEM FOR VEHICLE
    Publication number: 20100204884
    Abstract: An input system for vehicle includes an actuator operable by an operator, a controller outputting a display signal in response to an operation on the actuator, and a display to display an image based on the display signals. The controller outputs a control signal to a target device that performs one or more functions. The image includes a graphic object indicating the actuator, one or more arrows located around the graphic object, and one or more function indicators located in one or more directions indicated by the one or more arrows, respectively. The one or more function indicators indicate the one or more functions, respectively.
    Type: Application
    Filed: February 3, 2010
    Publication date: August 12, 2010
    Applicant: Panasonic Corporation
    Inventor: Tsuyoshi Tanaka
  • FILE INPUT/OUTPUT METHOD
    Publication number: 20100205329
    Abstract: Provided is a computer system comprising a computer and a plurality of storage devices. The plurality of storage devices store divided data which is obtained by dividing data contained in a file which can be accesed by the computer. The computer holds configuration information of the processor included in the computer and configuration information of the file which is stored by dividing the file; divides an I/O request of the file into a plurality of I/O requests for the plurality of storage devices; determines whether a predetermined condition is satisfied or not; and assigns a plurality of I/O threads of a number determined based on a result of the determination to the divided plurality of I/O requests. The processor inputs/outputs the divided data of the file held in the plurality of storage devices by using the assigned the plurality of I/O threads.
    Type: Application
    Filed: August 10, 2009
    Publication date: August 12, 2010
    Inventors: Toshiyuki UKAI, Tsuyoshi TANAKA, Takashi YASUI
  • Semiconductor device
    Patent number: 7759700
    Abstract: A semiconductor device includes: a first group-III nitride semiconductor layer formed on a substrate; a second group-III nitride semiconductor layer made of a single layer or two or more layers, formed on the first group-III nitride semiconductor layer, and acting as a barrier layer; a source electrode, a drain electrode, and a gate electrode formed on the second group-III nitride semiconductor layer, the gate electrode controlling a current flowing between the source and drain electrodes; and a heat radiation film with high thermal conductivity which covers, as a surface passivation film, the entire surface other than a bonding pad.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Hiroaki Ueno, Manabu Yanagihara, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Reading method of nonvolatile semiconductor memory device
    Publication number: 20100149871
    Abstract: Reading methods of a nonvolatile semiconductor memory device are described herein. Methods may include supplying, to a word line, one of a voltage corresponding to a highest reading level or a voltage having a level higher than a first reading level of a read operation to be performed on the word line, and subsequently supplying a voltage of the first reading level to the word line and performing the read operation.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 17, 2010
    Inventor: Tsuyoshi Tanaka