Patents by Inventor Tsuyoshi Tsutsui

Tsuyoshi Tsutsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6956242
    Abstract: A semiconductor light-emitting element 1 is mounted on a substrate 2 with an anisotropically conductive adhesive 3, which has electrically conductive particles 32 dispersion-mixed with a thermosetting resin 31, laid between a pair of electrodes 11 and 11? formed on the same surface of the semiconductor light-emitting element and wiring electrodes 21 and 21? formed on the substrate 2. Depressions 22 and 22? are formed in the portion of the surface of the wiring electrodes 21 and 21? facing the semiconductor light-emitting element 1 so that the electrically conductive particles 32 are stably present between the pair of electrodes 11 and 11? and the wiring electrodes 21 and 21?.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: October 18, 2005
    Assignee: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Publication number: 20050045899
    Abstract: A semiconductor light-emitting element 1 is mounted on a substrate 2 with an anisotropically conductive adhesive 3, which has electrically conductive particles 32 dispersion-mixed with a thermosetting resin 31, laid between a pair of electrodes 11 and 11? formed on the same surface of the semiconductor light-emitting element and wiring electrodes 21 and 21? formed on the substrate 2. Depressions 22 and 22? are formed in the portion of the surface of the wiring electrodes 21 and 21? facing the semiconductor light-emitting element 1 so that the electrically conductive particles 32 are stably present between the pair of electrodes 11 and 11? and the wiring electrodes 21 and 21?.
    Type: Application
    Filed: July 2, 2003
    Publication date: March 3, 2005
    Inventor: Tsuyoshi Tsutsui
  • Patent number: 6610589
    Abstract: A semiconductor lamination including an n-type layer and a p-type layer composed of a gallium nitride based compound semiconductor and forming a light emitting region is formed on the surface of a substrate. A p-side electrode is formed through a diffusion metal layer on the surface of the semiconductor lamination. Also, an n-side electrode is formed on the n-type layer exposed by etching off a part of the semiconductor lamination. The n-side electrode is formed of an ohmic contact electrode and a bonding electrode. The bonding electrode is formed in such a manner as to cover the surface and the sides of the ohmic contact electrode. As a result, a semiconductor light emitting device made of a gallium nitride based compound semiconductor is produced having an electrode structure of a superior ohmic contact characteristic and a superior wire bonding characteristic.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: August 26, 2003
    Assignee: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Publication number: 20020145151
    Abstract: A semiconductor lamination including an n-type layer and a p-type layer composed of a gallium nitride based compound semiconductor and forming a light emitting region is formed on the surface of a substrate. A p-side electrode is formed through a diffusion metal layer on the surface of the semiconductor lamination. Also, an n-side electrode is formed on the n-type layer exposed by etching off a part of the semiconductor lamination. The n-side electrode is formed of an ohmic contact electrode and a bonding electrode. The bonding electrode is formed in such a manner as to cover the surface and the sides of the ohmic contact electrode. As a result, a semiconductor light emitting device made of a gallium nitride based compound semiconductor is produced having an electrode structure of a superior ohmic contact characteristic and a superior wire bonding characteristic.
    Type: Application
    Filed: June 7, 2002
    Publication date: October 10, 2002
    Applicant: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Publication number: 20020115229
    Abstract: Semiconductor light-emitting elements are produced by providing a wafer substrate of GaP, epitaxially growing on this substrate a semiconductor layered structure including an n-type layer and a p-type layer of GaP for providing a light-emitting layer, forming top electrodes on the semiconductor layered structure each over a portion of the area corresponding to one of the chips into which the substrate is to be later divided, forming a bottom electrode on the bottom surface of the substrate, dicing the wafer substrate into the individual chips, and thereafter carrying out a surface-roughening process on externally exposed portions of the semiconductor structure by means of hydrochloric acid. Each of the top electrodes is of a three-layer structure with a contact metal layer which may be of an alloy of Au and makes an ohmic contact with the GaP of the semiconductor layered structure, a Mo layer on the contact metal layer and an Au layer on the Mo layer.
    Type: Application
    Filed: April 9, 2002
    Publication date: August 22, 2002
    Applicant: ROHM Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Kotaro Ogura
  • Patent number: 6414339
    Abstract: A semiconductor lamination including an n-type layer and a p-type layer composed of a gallium nitride based compound semiconductor and forming a light emitting region is formed on the surface of a substrate. A p-side electrode is formed through a diffusion metal layer on the surface of the semiconductor lamination. Also, an n-side electrode is formed on the n-type layer exposed by etching off a part of the semiconductor lamination. The n-side electrode is formed of an ohmic contact electrode and a bonding electrode. The bonding electrode is formed in such a manner as to cover the surface and the sides of the ohmic contact electrode. As a result, a semiconductor light emitting device made of a gallium nitride based compound semiconductor is produced having an electrode structure of a superior ohmic contact characteristic and a superior wire bonding characteristic.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: July 2, 2002
    Assignee: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Patent number: 6395572
    Abstract: Semiconductor light-emitting elements are produced by providing a wafer substrate of GaP, epitaxially growing on this substrate a semiconductor layered structure including an n-type layer and a p-type layer of GaP for providing a light-emitting layer, forming top electrodes on the semiconductor layered structure each over a portion of the area corresponding to one of the chips into which the substrate is to be later divided, forming a bottom electrode on the bottom surface of the substrate, dicing the wafer substrate into the individual chips, and thereafter carrying out a surface-roughening process on externally exposed portions of the semiconductor structure by means of hydrochloric acid. Each of the top electrodes is of a three-layer structure with a contact metal layer which may be of an alloy of Au and makes an ohmic contact with the GaP of the semiconductor layered structure, a Mo layer on the contact metal layer and an Au layer on the Mo layer.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: May 28, 2002
    Assignee: ROHM Co, Ltd.
    Inventors: Tsuyoshi Tsutsui, Kotaro Ogura
  • Patent number: 6265324
    Abstract: A mask 11 for vapor deposition is made of glass. Through-holes 15 are formed in the glass mask 11 so that they make a prescribed pattern on the surface of a semiconductor substrate 4. The peripheral wall of the through-hole is tapered so that the opening face 15b from which evaporated atoms are introduced is larger than the opening face 15a facing the deposition surface of the semiconductor substrate. The evaporated metal atoms having flied aslant toward the opening face 15b from which the evaporated atoms are introduced can pass through the through-hole 14 so that the evaporated metal atoms are deposited on the deposition surface of the semiconductor substrate. A desired thin film pattern inclusive of an electrode pattern can be easily formed on the surface of a semiconductor substrate, thereby improving the production yield of a semiconductor device.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: July 24, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yasuo Miyano, Koutarou Ogura
  • Patent number: 6258619
    Abstract: A semiconductor light emitting device includes a substrate, an n-type layer formed of gallium-nitride based compound semiconductor formed on the substrate, and a p-type layer formed of gallium-nitride based compound semiconductor formed on the substrate. Semiconductor overlying layers are constituted by the n-type layer and the p-type layer on the substrate. A light emitting layer is formed together with the n-type and p-type layers in the semiconductor overlying layers to emit light. At least one of the n-type layer and the p-type layer is formed by three or more overlying sublayers including a sublayer of AlyGa1-yN (0<y≦0.5) and a sublayer of AluGa1-uN (0≦u<y). With this structure, the semiconductor light emitting device is almost free from lattice mismatch to thereby enhance electron mobility and hence light emission efficiency even where the overlying semiconductor layers are different in lattice constant from the substrate.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 10, 2001
    Assignee: Rohm LTD
    Inventors: Masayuki Sonobe, Shunji Nakata, Yukio Shakuda, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6248607
    Abstract: In a method for manufacturing semiconductor light emitting device, when a gallium nitride based compound semiconductor layers which include at least an n-type layer and p-type layer and which form a light emitting layer, are laminated on a substrate and heat treatment is performed for activation of the p-type layer of the laminated semiconductor layers, the heat treatment is performed under an atmosphere including oxygen. With this arrangement, the heat treatment for activating the p-type layer of the laminated semiconductor layers comprising gallium nitride based compound semiconductor can be performed in a short time and moreover to reliably perform activation.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: June 19, 2001
    Assignee: Rohn Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Patent number: 6197609
    Abstract: Semiconductor layers forming a light emitting layer and including an n-type layer and p-type layer are formed onto a substrate, then the n-type layer is exposed by removing a part of the laminated semiconductor layers. p-side electrode and n-side electrode are then respectively formed on the p-type layer on the surface of the laminated semiconductor layers and the exposed n-type layer, respectively in an electrically connected manner, followed by dicing of the substrate from the exposed n-type layer to the substrate at portions at which breaking of the substrate is performed. Then a protection film is provided on the entire surface of the laminated semiconductor layers as to expose the p-side and n-side electrodes, and breaking of the substrate is performed at dicing portions into individual chips. Consequently, semiconductor light emitting devices can be obtained by breaking the wafer into individual chips without etching the protection film and without damaging the protection film at the time of breaking.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: March 6, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Masayuki Sonobe, Norikazu Ito
  • Patent number: 6194241
    Abstract: A semiconductor layered portion is formed of a gallium-nitride semiconductor overlying a substrate and having an n-type layer and a p-type layer to form a light emitting layer having a pn junction or a doublehetero junction. A gradient layer is provided at an interfacial portion between an lower layer and an upper layer of the semiconductor layered portion, wherein the gradient layer has a composition varied from a composition from said lower layer to a composition of the upper layer. With this structure, a semiconductor light emitting device which is excellent in light emitting efficiency is provided by reducing crystal lattice mismatch between semiconductor layers formed different in lattice constant on a substrate.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: February 27, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Norikazu Itoh
  • Patent number: 6191437
    Abstract: An n-type layer (3) and a p-type layer (5) which are made of a gallium nitride based compound semiconductor are provided on a substrate (1) so that a light emitting layer forming portion (10) for forming a light emitting layer is provided. A gallium nitride based compound semiconductor layer containing oxygen is used for at least one layer of the light emitting layer forming portion (10). In the case where a buffer layer (2) made of the gallium nitride based compound semiconductor or aluminum nitride is provided between the substrate (1) and the light emitting layer forming portion (10), the buffer layer (2) and/or at least one layer of the light emitting layer forming portion (10) may contain oxygen. By such a structure, crystal defects of the semiconductor layer of the light emitting layer forming portion (10) can be decreased and a luminance can highly be enhanced. Thus, it is possible to obtain a blue color type semiconductor light emitting device having a high luminance.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: February 20, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Masayuki Sonobe, Shunji Nakata, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6168962
    Abstract: Disclosed is a method of manufacturing a semiconductor light emitting device. Semiconductor overlying layers are formed on a substrate in a state of a wafer so that a light emitting area is provided therein. The semiconductor overlying layers includes first and second conductivity type layers. Part of the semiconductor overlying layers including the first conductivity type layer on a surface thereof is removed so as to expose part of the second conductivity type layer. Electrodes are formed, for each chip, respectively in connection with the surface of the first conductivity type layer and the surface of the exposed second conductivity type layer. The wafer is divided into individual chips. The exposed areas of the second conductivity type semiconductor layer is provided only part of a peripheral area of the chip so that the first conductivity type semiconductor layer is directly separated during dividing the wafer into individual chips.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: January 2, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Norikazu Itoh, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Tsuyoshi Tsutsui
  • Patent number: 6156584
    Abstract: Deposited on a wafer-like substrate for forming a plurality of light emitting device chips is a semiconductor layer laminate with a different property from that of the substrate. Then, electrodes are provided on and in electric connection with a top semiconductor layer of a first conductivity type of the semiconductor layer laminate, and on and in electric connection with a semiconductor layer of a second conductivity type, exposed by locally etching the semiconductor layer laminate, in association with the individual chips. Then, the semiconductor layer laminate is etched at boundary portions between the chips to expose the substrate, and the substrate is broken at the exposed portions into the chips. As the semiconductor layer laminate is etched out at the boundary portions between the chips before breaking the wafer, breaking can be facilitated without damaging the light emitting portions of the semiconductor layer laminate. This helps provide high-performance semiconductor light emitting devices.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: December 5, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Norikazu Itoh, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Tsuyoshi Tsutsui
  • Patent number: 6107644
    Abstract: A semiconductor light emitting device has semiconductor layers including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer formed on a substrate. A first electrode is formed in electrical connection with the first conductivity type semiconductor layer on a surface side of the semiconductor layers. The second conductivity type semiconductor layer is exposed by partly etch-removing an end portion of the semiconductor layers. A second electrode is provided in electrical connection with the exposed second conductivity type layer. The first and second electrodes are formed such that the electrodes are in parallel, in plan form, with each other at opposite portions thereof. As a result, the current path is constant in electric resistance, providing a semiconductor light emitting device that is constant in brightness, long in service life and high in brightness.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: August 22, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Shunji Nakata, Masayuki Sonobe, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6060730
    Abstract: There is provided a semiconductor laminated portion in which gallium nitride based compound semiconductor layers including an n-type layer and a p-type layer are laminated for forming an emitting layer on a substrate. Then, an n-side electrode and a p-side electrode are provided so as to be electrically connected to the n-type layer and p-type layer of the semiconductor laminated portion, respectively. The n-type layer includes at least an n-type first layer and an n.sup.+ -type second layer so that the carrier concentration of the portion to be provided with the n-side electrode is higher than the carrier concentration of the portion in contact with the emitting layer. Consequently, the ohmic contact characteristics of the n-type layer and n-side electrode are improved to reduce a forward voltage, resulting in a semiconductor light emitting device with high light emitting efficiency.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: May 9, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui
  • Patent number: 6054716
    Abstract: A semiconductor light emitting device incorporates therein with (a) a light emitting portion formed by semiconductor overlying layers including a first conductivity layer and a second conductivity layer in order to a light emitting layer, and (b) a protecting element portion provided in electrical connection between said first conductivity type layer and said second conductivity type layer so that said light emitting portion is protected against at least a reverse voltage applied to said light emitting portion. The light emitting portion and the protecting element portion can be formed by separate chips or in one chip having the both. They are formed into a lamp-type or chip-type light emitting device. The incorporation of the protecting element increase the reverse-voltage resistance for a compound semiconductor, such as galium-itride or the like, that is less resistive to reverse voltages applied.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: April 25, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Masayuki Sonobe, Tsuyoshi Tsutsui, Shunji Nakata, Norikazu Itoh, Shinji Isokawa, Hidekazu Toda
  • Patent number: 5939735
    Abstract: A semiconductor light emitting device includes a substrate and semiconductor overlying layers formed on the substrate. A light emitting layer is formed in the semiconductor layer so as to emit light. The substrate is transmittable of the light emitted by the light emitting layer. A light reflecting layer is formed on a part of a back surface of the substrate. As a result, a semiconductor light emitting device is obtainable by easily dividing a wafer having thereon a light emitting film through recognizing, from a wafer back side, semiconductor layer chip pattern formed overlying the main surface of the wafer.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: August 17, 1999
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Norikazu Itoh
  • Patent number: 5798536
    Abstract: Desclosed is a light-emitting semiconductor device has a light-emitting chip. The light-emitting chip has an insulator substrate and a semiconductor layer formed overlying the substrate. First and second conductivity type regions are formed in the semiconductor layer. The second conductivity type region has an exposed surface formed by removing part of the semiconductor layer. A top electrode is formed on a surface of the first conductivity type region. An end electrode is formed on an exposed surface of the second conductivity type region. A first electrode lead is mounted with the light-emitting chip and has a projecting portion extending along an adjacent surface of the light-emitting chip. A second electrode lead extends parallel to the first electrode lead. A conductor wire is electrically connected between the second electrode lead and the top electrode. The end electrode and the projecting portion are electrically connected through an electrically-conductive resin.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: August 25, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Tsuyoshi Tsutsui