Patents by Inventor Tsuyoshi Ukyou

Tsuyoshi Ukyou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Error correction device and error correction method
    Patent number: 8996966
    Abstract: According to one embodiment, an error correction device includes a syndrome processing unit, a generation unit, and a search processing unit. The syndrome processing unit generates a syndrome value based on received data. The generation unit generates t (t is a maximum number of correctable bits) coefficient values of an error position polynomial based on the syndrome value. The search processing unit calculates a root of the error position polynomial, with a concurrency of computation being equal to or greater than “2”, by using the coefficient values of the error position polynomial, when a number of error bits is not more than a predetermined value s (1<=s<t). The search processing unit calculates the root of the error position polynomial, with a concurrency of computation being “1”, when the number of error bits exceeds the predetermined value s.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: March 31, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Teruyuki Matsuoka, Yukio Ishikawa, Tsuyoshi Ukyou, Fuying Yang, Toshihiko Kitazume
  • ERROR CORRECTION DEVICE AND ERROR CORRECTION METHOD
    Publication number: 20150039975
    Abstract: According to one embodiment, an error correction device includes a syndrome processing unit, a generation unit, and a search processing unit. The syndrome processing unit generates a syndrome value based on received data. The generation unit generates t (t is a maximum number of correctable bits) coefficient values of an error position polynomial based on the syndrome value. The search processing unit calculates a root of the error position polynomial, with a concurrency of computation being equal to or greater than “2”, by using the coefficient values of the error position polynomial, when a number of error bits is not more than a predetermined value s (1<=s<t). The search processing unit calculates the root of the error position polynomial, with a concurrency of computation being “1”, when the number of error bits exceeds the predetermined value s.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 5, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Teruyuki MATSUOKA, Yukio Ishikawa, Tsuyoshi Ukyou, Fuying Yang, Toshihiko Kitazume