Abstract: The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including a first electrode having tapered sides that converge at a top of the first electrode, a dielectric layer disposed on and conforming to the tapered sides of the first electrode, a resistive layer in contact with the top of the first electrode and the dielectric layer, and a second electrode disposed on the resistive layer.

Abstract: A memory device and method of making the same is provided. The memory device comprises a first electrode having a length along a first axis, a second electrode having a length along a second axis that is perpendicular to the first axis, and a switching layer adjacent to the first electrode. A portion of the switching layer is positioned between a first electrode edge and a second electrode portion. The cross-sections of the first and second electrodes may have a polygonal shape.

Abstract: The disclosed subject matter relates generally to memory devices and a method of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including a first electrode having tapered sides that converge at a top of the first electrode, a dielectric layer disposed on and conforming to the tapered sides of the first electrode, a resistive layer in contact with the top of the first electrode and the dielectric layer, and a second electrode disposed on the resistive layer.

Abstract: A memory device and method of making the same is provided. The memory device comprises a first electrode having a length along a first axis, a second electrode having a length along a second axis that is perpendicular to the first axis, and a switching layer adjacent to the first electrode. A portion of the switching layer is positioned between a first electrode edge and a second electrode portion. The cross-sections of the first and second electrodes may have a polygonal shape.

Abstract: Methods of forming planar RRAM and vertical RRAM with tip electrodes and the resulting devices are provided. Embodiments include forming a first metal oxide layer on a first dielectric layer; forming and patterning a mask layer over the first metal oxide layer; etching the first metal oxide through the mask layer to form openings for a first and second metal electrodes; removing the mask layer; forming the first and second metal electrodes in the openings; and forming a second metal oxide layer over the first and second metal electrodes, wherein the first and second metal electrodes are v-shaped in top view with tips of the first and second metal electrodes facing each other and a portion of the second metal oxide layer being formed between the tips of the first and second electrodes.

Abstract: Methods of forming planar RRAM and vertical RRAM with tip electrodes and the resulting devices are provided. Embodiments include forming a first metal oxide layer on a first dielectric layer; forming and patterning a mask layer over the first metal oxide layer; etching the first metal oxide through the mask layer to form openings for a first and second metal electrodes; removing the mask layer; forming the first and second metal electrodes in the openings; and forming a second metal oxide layer over the first and second metal electrodes, wherein the first and second metal electrodes are v-shaped in top view with tips of the first and second metal electrodes facing each other and a portion of the second metal oxide layer being formed between the tips of the first and second electrodes.

Abstract: This invention provides a circuit and a method for generating a low-level current using semiconductor charge pumping. The invention provides a means of generating a range of current sources by varying the frequency of a repetitive voltage pulse input signal. Also, this invention utilizes one or many MOSFET devices in order to produce higher levels of current. The current source embodiments of this invention generate very stable current sources with high input impedances.

Abstract: A two-terminal memory device based on semiconductor (such as Si or Ge) or metal (such as Al or Au) nanocrystals and/or nanoparticles is described wherein each device has a substrate, a dielectric layer (such as SiO2 or organic dielectric materials) nanocrystals and/or nanoparticles distributed throughout the dielectric layer, and a metal (or poly-crystalline Si, or conductive organic materials) gate electrode. The memory states of the device are distinguished by charging and discharging the nanocrystals and/or nanoparticles. This two-terminal memory device is much simpler than the conventional four-terminal MOSFET-based memory device in terms of device structure and fabrication process. In addition, it is flexible if the memory devices are fabricated on flexible substrate with organic materials.

Abstract: This invention provides a circuit and a method for generating a low-level current using semiconductor charge pumping. The invention provides a means of generating a range of current sources by varying the frequency of a repetitive voltage pulse input signal. Also, this invention utilizes one or many MOSFET devices in order to produce higher levels of current. The current source embodiments of this invention generate very stable current sources with high input impedances.