Abstract: Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.

Abstract: Instead of estimating a saturation value for an ADC color comb register of an LCD made in a region without a standard color bar, a standard color bar of another geographic region is used to calculate the saturation value for the register so as to optimize the color of images presented on the LCD.

Abstract: Instead of estimating a saturation value for an ADC color comb register of an LCD made in a region without a standard color bar, a standard color bar of another geographic region is used to calculate the saturation value for the register so as to optimize the color of images presented on the LCD.

Abstract: Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.

Abstract: A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.

Abstract: Non-volatile storage elements having a P?/metal floating gate are disclosed herein. The floating gate may have a P? region near the tunnel oxide, and may have a metal region near the control gate. A P? region near the tunnel oxide helps provide good data retention. A metal region near the control gate helps to achieve a good coupling ratio between the control gate and floating gate. Therefore, programming of non-volatile storage elements is efficient. Also, erasing the non-volatile storage elements may be efficient. In some embodiments, having a P? region near the tunnel oxide (as opposed to a strongly doped p-type semiconductor) may improve erase efficiency relative to P+.

Abstract: Non-volatile storage elements having a PN floating gate are disclosed herein. The floating gate may have a P? region near the tunnel oxide, and may have an N+ region near the control gate. In some embodiments, a P? region near the tunnel oxide helps provide good data retention. In some embodiments, an N+ region near the control gate helps to achieve a good coupling ratio between the control gate and floating gate. Therefore, programming of non-volatile storage elements is efficient. Also erasing the non-volatile storage elements may be efficient. In some embodiments, having a P? region near the tunnel oxide (as opposed to a strongly doped p-type semiconductor) may improve erase efficiency relative to P+.

Abstract: An automated billing workflow system receives credit valuation adjustment (CVA) amounts associated with derivatives trades. The automated billing workflow system interacts with an Accounting System in order to make appropriate Profit and Loss (P&L) entries for the CVA amounts. The CVA amounts are billed to the business units which actually created the risk. The invention employs a plurality of Workflow Queues. As an item makes it way through the billing workflow, it may be slotted in one or more of these queues where further action will take place.

Abstract: High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical sidewalls of the metal control gate layer(s). The sidewall spacers encapsulate the metal control gate layer(s) while etching the charge storage material to avoid contamination of the charge storage and tunnel dielectric materials. Electrical isolation is provided, at least in part, by air gaps that are formed in the row direction and/or air gaps that are formed in the column direction.

Abstract: Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation between adjacent active areas of a substrate can be provided, at least in part, by bit line air gaps that are elongated in a column direction between the active areas. At least one cap is formed over each isolation region, at least partially overlying air to provide an upper endpoint for the corresponding air gap. The caps may be formed at least partially along the sidewalls of adjacent charge storage regions. In various embodiments, selective growth processes are used to form capping strips over the isolation regions to define the air gaps. Word line air gaps that are elongated in a row direction between adjacent rows of storage elements are also provided.

Abstract: Air gap isolation in non-volatile memory arrays and related fabrication processes are provided. Electrical isolation can be provided, at least in part, by bit line air gaps that are elongated in a column direction and/or word line air gaps that are elongated in a row direction. The bit line air gaps may be formed in the substrate, extending between adjacent active areas of the substrate, as well as above the substrate surface, extending between adjacent columns of non-volatile storage elements. The word line air gaps may be formed above the substrate surface, extending between adjacent rows of non-volatile storage elements.

Abstract: A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.

Abstract: A method of optimizing communication and processing functions between disparate applications includes sending, from a first application to a disparate second application, a request message. The request message, which has a reduced data size for optimizing communication, is formatted in a first request-format to provide unique data elements relevant to processing the request message. The received request message is reformatted into a second request format, and is then forwarded to a third application. The third application creates a response message that is in a first response format, and sends the response message to the second application. Each received response message is queued, by a messaging application, into a response message collection corresponding to a message type, before sending the response group to the first application.

Abstract: Instead of estimating a saturation value for an ADC color comb register of an LCD made in a region without a standard color bar, a standard color bar of another geographic region is used to calculate the saturation value for the register so as to optimize the color of images presented on the LCD.

Abstract: A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.

Abstract: An automated billing workflow system receives credit valuation adjustment (CVA) amounts associated with derivatives trades. The automated billing workflow system interacts with an Accounting System in order to make appropriate Profit and Loss (P&L) entries for the CVA amounts. The CVA amounts are billed to the business units which actually created the risk. The invention employs a plurality of Workflow Queues. As an item makes it way through the billing workflow, it may be slotted in one or more of these queues where further action will take place.

Abstract: Semiconductor devices are provided with encapsulating films for protection of sidewall features during fabrication processes, such as etching to form isolation regions. In a non-volatile flash memory, for example, a trench isolation process is divided into segments to incorporate an encapsulating film along the sidewalls of charge storage material. A pattern is formed over the layer stack followed by etching the charge storage material to form strips elongated in the column direction across the substrate, with a layer of tunnel dielectric material therebetween. Before etching the substrate, an encapsulating film is formed along the sidewalls of the strips of charge storage material. The encapsulating film can protect the sidewalls of the charge storage material during subsequent cleaning, oxidation and etch processes. In another example, the encapsulating film is simultaneously formed while etching to form strips of charge storage material and the isolation trenches.

Abstract: An automated billing workflow system receives credit valuation adjustment (CVA) amounts associated with derivatives trades. The automated billing workflow system interacts with an Accounting System in order to make appropriate Profit and Loss (P&L) entries for the CVA amounts. The CVA amounts are billed to the business units which actually created the risk. The invention employs a plurality of Workflow Queues. As an item makes it way through the billing workflow, it may be slotted in one or more of these queues where further action will take place.

Abstract: Methods of fabricating integrated circuit devices are provided using composite spacer formation processes. A composite spacer structure is used to pattern and etch the layer stack when forming select features of the devices. A composite storage structure includes a first spacer formed from a first layer of spacer material and second and third spacers formed from a second layer of spacer material. The process is suitable for making devices with line and space sizes at less then the minimum resolvable feature size of the photolithographic processes being used. Moreover, equal line and space sizes at less than the minimum feature size are possible. In one embodiment, an array of dual control gate non-volatile flash memory storage elements is formed using composite spacer structures. When forming the active areas of the substrate, with overlying strips of a layer stack and isolation regions therebetween, a composite spacer structure facilitates equal lengths of the strips and isolation regions therebetween.

Abstract: A method and system for sharing data between networks comprises an interface for receiving data from plural inputs; a policy-based router operationally connected to the interface, the policy-based router assigns security levels to the data based on security characteristics of the inputs and the policy-based router assigns virtual Internet protocol addresses to the data; a memory for retaining the data with the Internet protocol addresses, the memory being operationally connected to the policy-based router; a translator for converting the data into a standard format; and a network stack for transmitting the data to a network. The method includes assigning security levels to the data based on security characteristics of the inputs; assigning virtual Internet protocol addresses to the data; retaining the data with the Internet protocol addresses; converting the data into a standard format; and transmitting the data to a network.