Abstract: An apparatus for applying write signals including a first write signal and a second write signal to write information to a memory device includes a current directing circuit receiving the write signals and directing a write current to establish a write voltage between first and second write loci in a first or second excursion toward a first or second polarity in response to the first or second write signal. The first and second write loci are coupled with supply locus via an adjacent first or second impedance unit and a first or second switching unit. The first and second switching units are controlled at first and second control loci by the first and second write signals. First and second boost systems are coupled with the first and second control loci for boosting the write voltage toward the first and second polarities during first and second excursions.

Abstract: The present invention describes a voltage-mode boosting write driver circuit (160), comprising a plurality of inputs (WDP, WDN), a plurality of outputs (HWX, HWY), a transducer (L2), a flex interconnection (T1) coupled to the outputs (HWX, HWY) and to the transducer (L2), a first resistor (R15) and a second resistor (R43) coupled to the outputs (HWX, HWY) and to the transducer (L2), an H-switch (Q15, Q60, Q11, Q22) coupled to the resistors (R15, R43), and a plurality of top boosting circuits (Q42, Q47, R36, and Q43, Q48, R37) coupled to the outputs (HWX, HWY).

Abstract: The present invention relates to power input housings and assemblies for power distribution panels. The power input assemblies provide separate cavities with a centerwall for the power input cables to be led into and a cover closing the cavities. The cavities allow power cables to enter through either a top open end or a bottom open end and the cover is adapted to close the other open end when installed. Alternatively, the housing can be oriented with the open ends of the cavities to the sides, permitting cables to enter through either side and the cover closing the other side.

Abstract: A central controller for use in a semiconductor manufacturing equipment integrates a plurality of controllers with an open architecture allowing real-time communication between the various control loops. The central controller includes at least one central processing unit (CPU) executing high level input output (i/o) and control algorithms and at least one integrated i/o controller providing integrated interface to sensors and control hardware. The integrated i/o controller performs basic i/o and low level control functions and communicates with the CPU through a bus to perform or enable controls of various subsystems of the semiconductor manufacturing equipment.

Abstract: The present invention relates to power input housings and assemblies for power distribution panels. The power input assemblies provide separate cavities with a centerwall for the power input cables to be led into and a cover closing the cavities. The cavities allow power cables to enter through either a top open end or a bottom open end and the cover is adapted to close the other open end when installed. Alternatively, the housing can be oriented with the open ends of the cavities to the sides, permitting cables to enter through either side and the cover closing the other side.

Abstract: A process chamber with a computer system that controls the process chamber is connected to one or more spectrometers. The spectrometers may be part of an interferometer or may be an optical emission spectrometer. The spectrometers may be CCD or photodiode arrays of 2,048 elements. An input board forms part of the computer system and is directly connected to the spectrometers. The input board provides data from the spectrometers to dual port memory, which is directly accessible to the CPU of the computer system. The use of a state machine and adder on the input board allows computation and placement of the data from the spectrometers on to the dual port memory, so that the CPU is not needed for such placement.

Abstract: Variable reactances of a matching network connected between an r.f. source and a plasma load of a vacuum plasma chamber processing a workpiece are varied so a tendency of the plasma to change in an unstable manner which can adversely affect processing of the workpiece is avoided while matching is approached. The plasma tendency to change in an unstable manner is detected by monitoring an electrical parameter resulting from r.f. current flowing between the source and load via the network. The parameter can be (1) statistically based, e.g. variance of percent delivered power, or (2) amplitude modulation in one or both of the 2-20 kHz and 50-200 kHz ranges.

Abstract: A gas in a vacuum plasma processing chamber is ignited to a plasma by subjecting the gas to an r.f. field derived from an r.f. source having a frequency and power level sufficient to ignite the gas into the plasma and to maintain the plasma. The r.f. field is supplied to the gas by a reactive impedance element connected via a matching network to the r.f. source. The matching network includes first and second variable reactances that control loading of the source and tuning a load, including the reactive impedance element and the plasma, to the source. The value of only one of the reactances is varied until a local maximum of a function of power coupled between the source and the load is reached. The value of only the other reactance is varied until a local maximum of the function is reached. The two varying steps are then repeated as necessary.

Abstract: Variable reactances of a matching network connected between an r.f. source and a plasma load of a vacuum plasma chamber processing a workpiece are varied so a tendency of the plasma to change in an unstable manner which can adversely affect processing of the workpiece is avoided while matching is approached. The plasma tendency to change in an unstable manner is detected by monitoring an electrical parameter resulting from r.f. current flowing between the source and load via the network. The parameter can be (1) statistically based, e.g. variance of percent delivered power, or (2) amplitude modulation in one or both of the 2-20 kHz and 50-200 kHz ranges.

Abstract: An r.f. field is supplied by a reactive impedance element to a plasma in a vacuum plasma processing chamber. The element and source are connected via a matching network including first and second variable reactances that control loading of the source and tuning a load, including the reactive impedance element and the plasma, to the source. The values of the first and second variable reactances are changed to determine the amount the first variable reactance is to change for each unit change of the second variable reactance to attain the best match between the impedances seen looking into and out of output terminals of the r.f. source. Then the values of the first and second variable reactances are varied simultaneously based on the determination until the best impedance match between the impedances seen looking into and out of output terminals of the r.f. source is attained.

Abstract: An amplifier output stage includes current limiting circuitry for limiting the current in the output stage if the output terminal is shorted to ground. The current sinking and the current sourcing output transistors each have a current limiting circuit which mirrors the collector current of the output transistor, produces a voltage which is a function of the mirrored collector current, and controls base current to the output transistor as a function of the voltage. The output current limiting function, therefore, is provided without sacrificing output voltage swing of the output stage.

Abstract: Erase and "shifting write" pulses are applied across pairs of adjacent sites in each row of an ac plasma panel in a predetermined sequence. The shifting write pulse occurs during the conventional erase time period and its magnitude and duration are such that it will switch an OFF site on the ON state only if that site has received spread wall charge from an adjacent ON site. In addition, a scan erase pulse is used to temporarily lower the wall charge of certain ON sites when shifting is to be initiated, thereby preventing possible backshifting.

Abstract: An enhanced light pen capability for plasma display panels is provided by applying specially timed scan write and scan erase pulses to the cells of the panel, the pulses being shaped and positioned relative to the normal sustain pulse sequence such that a light pulse is emitted, while avoiding any but transient modification of the cell wall voltage. The light pulse is detected by a light pen of standard design. Dynamic keep-alive circuitry for applying location-dependent priming enhances the operating margins.

Abstract: Write pulses are applied to the cells of a plasma display panel to repetitively establish the cells in respective temporary ON states in which the wall voltage stored at each cell decays with each applied sustain pulse. The average number of sustain cycles over which a particular cell remains in the temporary ON state, and thus its perceived brightness, is controlled by controlling the intra-sustain-cycle time occurrence of the write pulses applied thereto.

Abstract: The state of a plasma or similar display cell is inverted by a two-pulse sequence comprising an inverting write pulse followed by an inverting erase pulse. The inverting write pulse switches a cell ON if it was OFF, while the inverting erase pulse switches the cell OFF if it was ON. The inverting write pulse is adapted to cause a gradual, rather than an immediate, wall voltage build-up so that the inverting erase pulse is of insufficient magnitude to turn a cell OFF if it was turned on by the inverting write pulse.

Abstract: A matrix array of liquid crystal cells is defined by overlapping pluralities of row and column conductors confining a layer of liquid crystal material. Each row conductor is connected through a bilateral threshold switch to one side of a source of periodic alternating polarity sustain signals, and the column conductors are sequentially connected to the other side of the source. When an initial charge is deposited on selected ones of the capacitors forming the liquid crystal cells, the series combination of the resulting stored voltage and the sustain signals is sufficient to exceed the threshold of the bilateral switch, thereby connecting the previously selected cells to the source of alternating source on a column-by-column basis so as to recharge the previously selected cells. Since charged cells exhibit differing electro-optic properties from uncharged cells, a graphical image may be generated and stored without the need for information-bearing refresh signals.

Abstract: An a-c plasma display panel including apparatus for driving the keep-alive cell sustain signal circuits in a non-fixed relation with address pulses. By constraining the keep-alive sustain signal to selectively lag the addressing signal by an amount dependent on the address of a cell being addressed it is possible to refine the control over voltage margins afforded by dynamic keep-alive while simplifying the circuitry required to produce it.

Abstract: A planar plasma discharge shift register includes a plurality of electrodes of a first polarity and a unitary electrode of the opposite polarity. Multi-phase clock signals applied in succession to each of the pluralities of electrodes cause a plasma discharge, once initiated, to propagate in controlled fashion along a path prescribed by the location of the electrodes. By suitable shaping of the electrodes, and through a judicious choice of clock signals, it is possible to propagate a gaseous discharge bi-directionally.

Abstract: An a-c plasma display panel including apparatus for driving the keep-alive cell sustain signal circuits in a non-fixed relation with address pulses. By constraining the keep-alive cells to be sustained in a time relation dependent on the address of a cell being addressed it is possible to increase the margins for the address signals and, in general, permit a reduction in magnitude of such address signals.

Abstract: An enhanced light pen capability is provided in plasma display panels by applying specially timed write and erase pulses in a scanning manner over the panel, the pulses being shaped and positioned relative to the normal sustain pulse sequence in such manner that a light pulse is emitted upon the resulting momentary write or erase which is detected by a light pen of standard design while avoiding any but transient modification to the state of the cell wall capacitance. The scanned write pulses advantageously assume the form of modified write pulses with shortened duration and less abrupt terminations than is usual. Dynamic keep-alive circuitry for applying location-dependent priming enhances the operating margins to permit reliable, constant-voltage write and erase signals for all cell locations.