Patents by Inventor Tugrul Yasar

Tugrul Yasar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7744735
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) onto semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 0-10 Gauss. Static magnetic fields during deposition modes may be more than 150 Gauss, in the range of 0-50 Gauss, or preferably 20-30 Gauss, and may be the same as during etch modes or switched between a higher level during deposition modes and a lower level, including zero, during etch modes. Such switching may be by switching electromagnet current or by moving permanent magnets, by translation or rotation. Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 1-10 Gauss. The modes may operate at different power and pressure parameters.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: June 29, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Rodney Lee Robison, Jacques Faguet, Bruce Gittleman, Tugrul Yasar, Frank Cerio, Jozef Brcka
  • Publication number: 20040188239
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) onto semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 0-10 Gauss. Static magnetic fields during deposition modes may be more than 150 Gauss, in the range of 0-50 Gauss, or preferably 20-30 Gauss, and may be the same as during etch modes or switched between a higher level during deposition modes and a lower level, including zero, during etch modes. Such switching may be by switching electromagnet current or by moving permanent magnets, by translation or rotation. Static magnetic fields are kept to a minimum during at least the etch modes, at least less than 150 Gauss, typically less than 50 Gauss, and preferably in the range of 1-10 Gauss. The modes may operate at different power and pressure parameters.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 30, 2004
    Inventors: Rodney Lee Robison, Jacques Faquet, Bruce Gittleman, Tugrul Yasar, Frank Cerio, Jozef Brcka
  • Patent number: 6755945
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) into high aspect ratio submicron features (11) on semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). The modes operate at different power and pressure parameters. Pressure of more than 50 mTorr, for example, is used for sputtering material from a target while pressure of less than a few mTorr, for example, is used to etch. Bias power on the substrate is an order of magnitude higher for etching, producing several hundred volt bias for etching, but only a few tens of volts for deposition. The alternating etching modes remove deposited material that overhangs edges of features on the substrate, removes some of the deposited material from the bottoms (15) of the features, and resputters the removed deposited material onto sidewalls (16) of the features. The substrate (21) is cooled during deposition and etching, and particularly during etching to substantially below 0° C.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: June 29, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Tugrul Yasar, Glyn Reynolds, Frank Cerio, Bruce Gittleman, Michael Grapperhaus, Rodney Robison
  • Patent number: 6730605
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: May 4, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Patent number: 6652711
    Abstract: A plasma processing system efficiently couples radiofrequency energy to a plasma confined within a vacuum processing space inside a vacuum chamber. The plasma processing system comprises a frustoconical dielectric window, an inductive element disposed outside of the dielectric window, and a frustoconical support member incorporated into an opening in the chamber wall. The support member has a frustoconical panel that mechanically supports a frustoconical section of the dielectric window. The dielectric window is formed of a dielectric material, such as a ceramic or a polymer, and has a reduced thickness due to the mechanical support provided by the support member. The processing system may include a gas source positioned above the substrate support for introducing the process gas into the vacuum processing space.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: November 25, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Jozef Brcka, John Drewery, Michael Grapperhaus, Gerrit Leusink, Glyn Reynolds, Mirko Vukovic, Tugrul Yasar
  • Patent number: 6635569
    Abstract: A methodology is described by which a processing chamber used to deposit plasma-enhanced Ti-CVD films may be conditioned and passivated efficiently after either a wet cleaning or in-situ chemical cleaning, or after each successive deposition sequence. The technique allows a CVD process, such as, for example, a Ti-PECVD process, to recover film properties, such as resistivity, uniformity, and deposition rate, in a minimum time and following a minimum number of conditioning wafers, thereby improving the productivity of the system. The technique also maintains the stability of the system during continuous operation. This allows for the processing of thousands of wafers between in-situ cleaning of the chamber.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: October 21, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Michael S. Ameen, Joseph T. Hillman, Gert Leusink, Michael Ward, Tugrul Yasar
  • Patent number: 6632737
    Abstract: A method for chemical vapor deposition comprises providing a thin layer of silicon on the surface of a dielectric-covered substrate prior to depositing a tantalum-based barrier layer from a mixture of a vapor-phase reactant comprising a tantalum halide and a reducing gas. The thin layer of silicon serves to significantly reduce the accumulation of halogen atoms at the interface between the tantalum-based layer and dielectric. The thin layer of silicon may be substantially removed from the surface of the dielectric during the chemical vapor deposition. The method advantageously promotes the adhesion of the tantalum-based layer to the dielectric by reducing the halogen content at the tantalum/dielectric interface.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: October 14, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Joseph T. Hillman, Tugrul Yasar, Richard C. Westhoff
  • Patent number: 6548112
    Abstract: A CVD reactor is provided with a precursor delivery system that is integrally connected to the reactor chamber. Liquid precursor such as a copper or other metal-organic precursor is atomized at the entry of a high flow-conductance vaporizer, preferably with the assistance of an inert sweep gas. Liquid precursor is maintained, when in an unstable liquid state, at or below room temperature. In the vaporizer, heat is introduced to uniformly heat the atomized precursor. The vaporized precursor is passed into a diffuser which diffuses the vapor, either directly or through a showerhead, into the reaction chamber.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: April 15, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Joseph T. Hillman, Tugrul Yasar, Kenichi Kubo, Vincent Vezin, Hideaki Yamasaki, Yasuhiko Kojima, Yumiko Kawano, Hideki Yoshikawa
  • Publication number: 20030034244
    Abstract: An iPVD apparatus (20) is programmed to deposit material (10) into high aspect ratio submicron features (11) on semiconductor substrates (21) by cycling between deposition and etch modes within a vacuum chamber (30). The modes operate at different power and pressure parameters. Pressure of more than 50 mTorr, for example, is used for sputtering material from a target while pressure of less than a few mTorr, for example, is used to etch. Bias power on the substrate is an order of magnitude higher for etching, producing several hundred volt bias for etching, but only a few tens of volts for deposition. The alternating etching modes remove deposited material that overhangs edges of features on the substrate, removes some of the deposited material from the bottoms (15) of the features, and resputters the removed deposited material onto sidewalls (16) of the features. The substrate (21) is cooled during deposition and etching, and particularly during etching to substantially below 0° C.
    Type: Application
    Filed: May 3, 2002
    Publication date: February 20, 2003
    Inventors: Tugrul Yasar, Glyn Reynolds, Frank Cerio, Bruce Gittleman, Michael Grapperhaus, Rodney Robison
  • Publication number: 20020185229
    Abstract: A plasma processing system efficiently couples radiofrequency energy to a plasma confined within a vacuum processing space inside a vacuum chamber. The plasma processing system comprises a frustoconical dielectric window, an inductive element disposed outside of the dielectric window, and a frustoconical support member incorporated into an opening in the chamber wall. The support member has a frustoconical panel that mechanically supports a frustoconical section of the dielectric window. The dielectric window is formed of a dielectric material, such as a ceramic or a polymer, and has a reduced thickness due to the mechanical support provided by the support member. The processing system may include a gas source positioned above the substrate support for introducing the process gas into the vacuum processing space.
    Type: Application
    Filed: June 6, 2001
    Publication date: December 12, 2002
    Applicant: Tokyo Electron Limited of TBS Broadcast Center
    Inventors: Jozef Brcka, John Drewery, Michael Grapperhaus, Gerrit Leusink, Glyn Reynolds, Mirko Vukovic, Tugrul Yasar
  • Publication number: 20020148720
    Abstract: A method to redistribute solid copper deposited by PVD on a wafer topography. The deposited copper is solubilized in a fluid for redistribution. The copper redistribution prevents inherent nonuniformity of the deposited copper film thickness by improving the uniformity of thickness of the copper film on the covered surfaces, such as vertical and bottom surfaces. The method provides the advantages of good adhesion and good grain growth and orientation that are achieved with copper deposited by PVD, and also provides the good step coverage as achieved with copper deposited by CVD.
    Type: Application
    Filed: April 12, 2001
    Publication date: October 17, 2002
    Applicant: Tokyo Electron Limited
    Inventors: Chantal Arena-Foster, Robert F. Foster, Joseph T. Hillman, Thomas J. Licata, Tugrul Yasar
  • Publication number: 20020137338
    Abstract: Method for controlling the morphology and impeding electromigration of sputtered copper films and semiconductor wafers produced thereby. Copper may be deposited onto a seed layer or wetting layer of a dopant metal by PVD at an elevated temperature relative to the temperature at which the seed layer is deposited. Copper may also be deposited in a two step PVD process whereby a first copper layer is deposited at a lower temperature relative to a second copper layer. The resulting film has a smooth surface and no voids.
    Type: Application
    Filed: March 26, 2001
    Publication date: September 26, 2002
    Applicant: Tokyo Electron Limited
    Inventors: Tugrul Yasar, Joseph T. Hillman, Thomas Kandris
  • Patent number: 6417626
    Abstract: A plasma processing system having a plasma source that efficiently couple radiofrequency energy to a plasma within a vacuum processing space of a vacuum chamber. The plasma source comprises a dielectric trough, an inductive element, and a pair of slotted deposition shields. A chamber wall of the vacuum chamber includes an annular opening that receives the dielectric trough. The trough projects into the vacuum processing space to immerse the inductive element within the plasma. The spatial distribution of the RF energy inductively coupled from the inductive element to the plasma may be tailored by altering the slots in the slotted deposition shields, the configuration of the inductive element, and the thickness or geometry of the trough. The efficient inductive coupling of radiofrequency energy is particularly effective for creating a spatially-uniform large-area plasma for the processing of large-area substrates.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: July 9, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Jozef Brcka, John Drewery, Michael Grapperhaus, Gerrit Leusink, Glyn Reynolds, Mirko Vukovic, Tugrul Yasar
  • Patent number: 6302057
    Abstract: An apparatus for depositing a film on a substrate utilizing a plasma-enhanced chemical vapor deposition process comprises a process chamber having an electrically grounded element therein and an RF biased electrode positioned in the process chamber proximate a substrate. An insulative element is coupled between the electrode and the grounded element other than the grounded substrates, and is formed of an electrically insulative material and has an insulative surface for effectively electrically isolating the electrode from the grounded element within the process chamber. The insulative element includes at least one feature formed in the insulative surface, wherein the feature has a high effective aspect ratio for inhibiting the deposition of a film therein to thereby create an electrical discontinuity in a film which may form on the insulative surface during the plasma-enhanced chemical vapor deposition process.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: October 16, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Gerrit J. Leusink, Michael G. Ward, Tayler Bao, Jerry Yeh, Joseph T. Hillman, Tugrul Yasar
  • Patent number: 6183615
    Abstract: A wafer processing system includes a plurality of evacuable housings connected in series to form a processing line, with a plurality isolation valves to separately isolate the housings. A track extends through the connected housings. At least one wafer carrier is moveable on the track, through the housings and along the processing line. The wafer carrier holds wafers in vertical orientation and also includes a plurality of magnets aligned along its bottom. Outside the housings, a plurality of magnetic drive units are aligned parallel with the track, with one drive unit per housing. Each drive unit includes a motor driven conveyor with a plurality of magnets mounted thereon which imposes magnetic fields inside the housing to magnetically couple with the magnets mounted on the carrier. When the motor driven conveyor moves the imposed magnetic fields, the magnetic coupling causes the wafer carrier to move.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: February 6, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Tugrul Yasar, Rodney Lee Robison, Daniel Deyo, Marian Zielinski
  • Patent number: 5958134
    Abstract: Method and apparatus for forming the longitudinal edges of stacks of razor blades by conveying the stacks of razor blades along a conveying path in a vacuum chamber past material deposition and material etching stations. The material etching stations are mounted in the sides of the vacuum chamber to be directed generally toward the edge sides of the edges of the razor blades. In another embodiment, stacks of razor blades are mounted on opposite sides of a rotating pallet and material deposition and etching stations are mounted in both side walls of the vacuum chamber. A DC or RF bias is applied to the stacks of razor blades by capacitively coupling the RF bias or conducting by electrical contacts a DC or RF bias to a central portion of the rotating pallet.
    Type: Grant
    Filed: December 4, 1995
    Date of Patent: September 28, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Tugrul Yasar, Ira Reiss, Subhadra Gupta, Rajendrapura Seetharamaiya Krishnaswamy, Israel Wagner
  • Patent number: 5474667
    Abstract: A sputtering target assembly in which the region of attachment between the sputtering target and the backing plate has varying stiffness, thereby reducing stresses in the target during sputtering. In the region of attachment, the backing plate has varying thickness, for example a smooth taper. Alternatively, the backing plate may include structures which affect the stiffness of the backing plate in the region of attachment. These structures may be defined by machining, molding or forging during manufacture of the backing plate, or by machining or drilling voids in the backing plate. As a second alternative, the bonding material used to attach the sputtering target and the backing plate may have a varying stiffness across the region of attachment.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: December 12, 1995
    Assignee: Materials Research Corporation
    Inventors: Steven D. Hurwitt, Tugrul Yasar, Bhola N. De, Jon S. Hsu
  • Patent number: 5408322
    Abstract: An ellipsometric measuring system is set-up in association with a vacuum chamber on a production line for thin film samples. The ellipsometer has a scanner for directing the incident light beam to different locations on a thin film sample, and the ellipsometer also has an aperture for limiting the reflected light beam received by the photodetector. The scanner implements a method of aligning the incident beam to a selected surface of the sample. The scanner and the aperture are used to provide a finer adjustment of the incident beam with respect to the selected surface. The ellipsometric measuring system further uses test thin film samples with known film thicknesses and index or refractions to calculate a value for the angle of incidence of the incident light beam.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: April 18, 1995
    Assignee: Materials Research Corporation
    Inventors: Jon S. Hsu, Bhola N. De, Rodney L. Robison, Tugrul Yasar
  • Patent number: 5105529
    Abstract: The present process is for the manufacture of a monolithic read/write recording head for use in disk drives. The airborne slider body and the transducer nose portion of the head is made from the same magnetic ferrite material. The magnetic material preferably consists of NiZn ferrite or MnZn ferrite. A narrow track ridge has a non-magnetic gap interposed across the track at some distance atop the I-bar coil assembly, between the slider and the transducer portion. The instant process provides a self-aligned track ridge across the gap by virtue of machining the ridge in one bonded piece.For protection, this narrow gap and track ridge portion is glass encapsulated. Another embodiment of the instant process provides for a slider body equipped with both a servotype and data recording transducer assembly.The process provides attachment on a spring-loaded head holder in such a position that the spring axis is in parallel with the long dimension of the body along its air bearing surface.
    Type: Grant
    Filed: May 7, 1991
    Date of Patent: April 21, 1992
    Assignee: National Micronetics, Inc.
    Inventors: Tugrul Yasar, Robert T. Sturrock, Harry P. Harnischfeger
  • Patent number: 5072322
    Abstract: The present invention relates to a novel monolithic read/write recording head for use in disk drives. The airborne slider body and the transducer nose portion of the head is made from the same magnetic ferrite material. The magnetic material preferably consists of NiZn ferrite or MnZn ferrite. A narrow track surface has a non-magnetic gap interposed across the track at some distance atop the I-bar coil assembly, between the slider and the transducer portion. For protection, this gap and track area is embedded in molten glass. Another embodiment of the invention provides for a slider body equipped with both a servotype and data recording transducer assembly.The novel design provides attachment on a spring-loaded head holder in such a position that the spring axis is in parallel with the long dimension of the body along its air bearing surface. Alternatively, the head can have mounting blocks arranged such that the spring axis is directed perpendicularly to the long dimension of the body.
    Type: Grant
    Filed: October 17, 1988
    Date of Patent: December 10, 1991
    Assignee: National Micronetics, Inc.
    Inventors: Tugrul Yasar, Robert T. Sturrock, Harry P. Harnischfeger