Patents by Inventor Tuh-Kai Koo

Tuh-Kai Koo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4156249
    Abstract: A semiconductor tunable capacitor is described. This tunable capacitor employs a plurality of metal-insulator-semiconductor (MIS) capacitive segments and each element has a first and a second value of capacitance. The solid state capacitor employs a plurality of tuning terminals and a single capacitor terminal. Tuning signals are applied to each of the tuning terminals for switching that capacitive segment into its high or low capacitive state. The capacitor terminal is capacitively connected to each capacitive segment and is employed for summing the individual values of capacitance into a total value of capacitance. An MNOS capacitor is shown as the preferred embodiment.
    Type: Grant
    Filed: June 5, 1978
    Date of Patent: May 22, 1979
    Assignee: NCR Corporation
    Inventor: Tuh-Kai Koo
  • Patent number: 4125427
    Abstract: An improvement of the prior art method of processing large scale integrated (LSI) semiconductors is disclosed, wherein an etching procedure, which was previously performed as the final processing step, is now done at an earlier stage to preclude damage to the surface of the wafer on which the active devices are formed. In the prior art method of fabricating an active device on a semiconductor wafer, an undesirable layer of field oxide manifests itself on the reverse side when the field oxide is grown on the obverse or principal side of the wafer. The prior processing philosophy was to allow the oxide layer to remain on the wafer until after the processing was completed and, as a final step, the undesired oxide coating was removed. This was done by carefully placing the wafer in a pool of etchant so that only the reverse side is etched.
    Type: Grant
    Filed: August 27, 1976
    Date of Patent: November 14, 1978
    Assignee: NCR Corporation
    Inventors: Peter C. Chen, John K. Stewart, Jr., Tuh-Kai Koo
  • Patent number: 4041896
    Abstract: A coating system applies silicon dioxide to microelectronic dies mounted on electrical conductor systems such as lead frames, circuit boards and to connecting wires in a single operation while preventing the deposition of silicon dioxide on the outer portions of leads which are formed as part of its lead frame.
    Type: Grant
    Filed: May 12, 1975
    Date of Patent: August 16, 1977
    Assignee: NCR Corporation
    Inventors: Tuh-Kai Koo, Armand J. VAN Velthoven
  • Patent number: 4032373
    Abstract: A matrix array of semiconductor diodes formed in an epitaxial layer of a semiconductor wafer and being dielectrically isolated from each other by two orthogonal sets of parallel insulating oxide regions, one set extending completely through the epitaxial layer and the other set extending only partially through the epitaxial layer. A preferred method of forming the matrix array is also disclosed.
    Type: Grant
    Filed: October 1, 1975
    Date of Patent: June 28, 1977
    Assignee: NCR Corporation
    Inventor: Tuh-Kai Koo
  • Patent number: 4001050
    Abstract: A method of forming dielectrically isolated islands of semiconductor material on which discrete devices may be formed is disclosed. A wafer of semiconductive material is provided with an oxide layer and, by ion implantation, is lightly doped after which, openings are formed in the oxide. The portions of wafer exposed by the openings are then heavily doped and the wafer is then subjected to a high temperature step to drive in the dopants and produce isolated areas.
    Type: Grant
    Filed: November 10, 1975
    Date of Patent: January 4, 1977
    Assignee: NCR Corporation
    Inventor: Tuh-Kai Koo