Patents by Inventor Tulley M. Peters

Tulley M. Peters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data processing system for performing a test function and method therefor
    Patent number: 5828827
    Abstract: Circuitry is implemented within an integrated circuit ("chip") (101) which is an IEEE 1149.1 compliant device capable of performing JTAG testing (104), such as an EXTEST or CLAMP testing procedure. Upon exiting of either of these procedures, the input/output pins (210) of the chip are placed in a known state, which may be a high impedance state.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: October 27, 1998
    Assignee: Motorola, Inc.
    Inventors: Michael A. Mateja, Tulley M. Peters, Donald L. Tietjen
  • Load double test instruction
    Patent number: 4679194
    Abstract: In a data processor having an instruction which requires the loading of the contents of two (2) successive locations in the address space during respective bus cycles, test circuitry is provided to selectively force the processor to twice load the contents of the same location upon execution of the instruction. Using this special load double test instruction, the processor is able to detect more precisely when the contents of the memory location changes in value as a result of the activity of other circuitry.
    Type: Grant
    Filed: October 1, 1984
    Date of Patent: July 7, 1987
    Assignee: Motorola, Inc.
    Inventors: Tulley M. Peters, William C. Bruce, Jr.