Patents by Inventor Tulsi Manickam
Tulsi Manickam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8447000Abstract: A receiver that easily receives signals from transmission channels having long cable lengths is presented. The receiver includes an analog pre-filter that removes distortions and intersymbol interference from a predetermined transmission channel. The analog pre-filter is coupled with a digital receiver that provides digital equalization. The combination of analog equalization with digital equalization allows for simplified digital equalization while retaining the versatility of digital signal processing.Type: GrantFiled: January 12, 2009Date of Patent: May 21, 2013Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Publication number: 20120183025Abstract: A receiver that easily receives signals from transmission channels having long cable lengths is presented. The receiver includes an analog pre-filter that removes distortions and intersymbol interference from a predetermined transmission channel. The analog pre-filter is coupled with a digital receiver that provides digital equalization. The combination of analog equalization with digital equalization allows for simplified digital equalization while retaining the versatility of digital signal processing.Type: ApplicationFiled: January 12, 2009Publication date: July 19, 2012Inventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Patent number: 8005135Abstract: An analog equalizer (613 and 614) adaptively equalizes an input analog signal affected with intersymbol interference (“ISI”), or an intermediate analog signal generated therefrom, to produce a filtered partially equalized analog signal with reduced ISI. An analog-to-digital converter (210) converts the filtered analog signal, or an intermediate analog signal generated therefrom, into an initial digital signal. A digital equalizer (212) adaptively equalizes the initial digital signal, or an intermediate digital signal generated therefrom, to produce an equalized digital signal as a stream of equalized digital values with further reduced ISI. An output decoder (605) decodes the equalized digital values, or intermediate digital values generated therefrom, into a stream of symbols.Type: GrantFiled: December 21, 2009Date of Patent: August 23, 2011Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Patent number: 7756228Abstract: Analog echo-cancelling circuitry (611 and 627) operates on an input analog signal that includes an echo of an output signal, or on an analog signal generated from the input signal, to produce an analog signal with reduced echo. An analog-to-digital converter (210) converts the echo-reduced analog signal, or an analog signal generated therefrom, into a digital signal. Digital echo-cancelling circuitry (615 and 621) operates on the digital signal, or on a digital signal generated therefrom, to produce a digital signal with further reduced echo. An output decoder (605) decodes the echo-reduced digital signal, or a digital signal generated therefrom, into a stream of symbols. The echo-filtering characteristics of both echo-cancelling circuitries are typically adaptively adjusted during generation of the symbol stream. The analog echo-filtering characteristics may be adapted in response to information provided by operating on the echo-reduced digital signal or on a digital signal generated therefrom.Type: GrantFiled: October 2, 2006Date of Patent: July 13, 2010Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Patent number: 7746969Abstract: A receiver for a multi-channel system such as a HDMI system is presented. In accordance with the present invention, the receiver receives one of the plurality of channels and includes an analog portion, a digital-to-analog converter, and a digital control block that provides digital control signals to the analog portion. Equalization can be accomplished partially or wholly in the analog domain and digitally controlled by a digital control loop. A digital equalizer can also be included. A decision feedback equalizer can be implemented that sums an analog output signal into the analog data stream. Timing recovery can be accomplished by digital control of a phase interpolator or delay locked loop that receives a plurality of phases from a timing circuit coupled to receive a clock signal.Type: GrantFiled: March 28, 2006Date of Patent: June 29, 2010Assignee: Entropic Communications, Inc.Inventors: Thomas Bryan, Stewart Webb, Peter Sallaway, Tulsi Manickam, Sreen Raghavan
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Patent number: 7664172Abstract: A receiver system contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605) arranged sequentially for processing an input analog signal (yk). The pre-filter produces a filtered analog signal (Zs) with reduced intersymbol interference. The converter provides analog-to-digital signal conversion. Digital equalization circuitry in the equalizer operates according to a transfer frmnction c - 1 ? z + c 0 + ? M i = 1 ? c i ? z - i to produce an equalized digital signal (a'k) as a stream of equalized digital values. Coefficients c?1 and c0 are fixed. Each other coefficient ci is adaptively chosen. The decoder converts the equalized digital values, or intermediate values generated therefrom, into a stream of symbols.Type: GrantFiled: August 15, 2006Date of Patent: February 16, 2010Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Patent number: 7646807Abstract: An analog equalizer (613 and 614) adaptively equalizes an input analog signal affected with intersymbol interference (“ISI”), or an intermediate analog signal generated therefrom, to produce a filtered partially equalized analog signal with reduced ISI. An analog-to-digital converter (210) converts the filtered analog signal, or an intermediate analog signal generated therefrom, into an initial digital signal. A digital equalizer (212) adaptively equalizes the initial digital signal, or an intermediate digital signal generated therefrom, to produce an equalized digital signal as a stream of equalized digital values with further reduced ISI. An output decoder (605) decodes the equalized digital values, or intermediate digital values generated therefrom, into a stream of symbols.Type: GrantFiled: July 19, 2006Date of Patent: January 12, 2010Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser
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Publication number: 20070230640Abstract: A receiver for a multi-channel system such as a HDMI system is presented. In accordance with the present invention, the receiver receives one of the plurality of channels and includes an analog portion, a digital-to-analog converter, and a digital control block that provides digital control signals to the analog portion. Equalization can be accomplished partially or wholly in the analog domain and digitally controlled by a digital control loop. A digital equalizer can also be included. A decision feedback equalizer can be implemented that sums an analog output signal into the analog data stream. Timing recovery can be accomplished by digital control of a phase interpolator or delay locked loop that receives a plurality of phases from a timing circuit coupled to receive a clock signal.Type: ApplicationFiled: March 28, 2006Publication date: October 4, 2007Inventors: Thomas Bryan, Stewart Webb, Peter Sallaway, Tulsi Manickam, Sreen Raghavan
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Patent number: 7254198Abstract: A receiver system suitable for a local area network contains an analog pre-filter (207 or 619), an analog-to-digital converter (210), a digital equalizer (212), and a decoder (605). A symbol-information-carrying input analog signal (yk), or a first intermediate analog signal generated from the input analog signal, is filtered by filtering circuitry in the pre-filter to produce a filtered analog signal (Zs) with reduced intersymbol interference. The filtering circuitry operates according to a transfer function such as (b1s+1)/(a2s2+a1s+1) or (1?Vc)+VcPF(s) where Vc is adaptively varied. The analog-to-digital converter provides analog-to-digital signal conversion. The equalizer provides digital signal equalization to produce an equalized digital signal (a?k) as a stream of equalized digital values. The decoder converts the equalized digital values, or intermediate digital values generated from the equalized digital values, into a stream of symbols.Type: GrantFiled: April 28, 2000Date of Patent: August 7, 2007Assignee: National Semiconductor CorporationInventors: Tulsi Manickam, Peter J. Sallaway, Sreen A. Raghavan, Abhijit M. Phanse, James B. Wieser