Patents by Inventor Tun Jun Gao

Tun Jun Gao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System level integrated circuit chip
    Patent number: 11157421
    Abstract: The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic module comprising a CPU module, a non-volatile memory module, a high speed data transmission module, an analogue-to-digital and/or digital-to-analogue conversion module; the Programmable Logic Module comprising a user-defined field programmable gate array and a programmable control module; the CPU module is interconnected with the user-defined field programmable gate array and the programmable control module; the non-volatile memory is interconnected with the user-defined field programmable gate array and the programmable control module; the analogue-to-digital and/or digital-to-analogue conversion module are connected with the user-defined field programmable gate array; and the high speed data transmission module is interconnected with the user-defined field programmable gate array.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: October 26, 2021
    Assignee: GOWIN Semiconductor Corporation
    Inventors: Jinghui Zhu, San-Ta Kow, Tun Jun Gao, Diwakar Chopperla, Chienkuang Chen, Ning Song
  • SYSTEM LEVEL INTEGRATED CIRCUIT CHIP
    Publication number: 20190114268
    Abstract: The present application discloses a system level integrated circuit chip, comprising a fixed logic module and a Programmable Logic Module; the fixed logic module comprising a CPU module, a non-volatile memory module, a high speed data transmission module, an analogue-to-digital and/or digital-to-analogue conversion module; the Programmable Logic Module comprising a user-defined field programmable gate array and a programmable control module; the CPU module is interconnected with the user-defined field programmable gate array and the programmable control module; the non-volatile memory is interconnected with the user-defined field programmable gate array and the programmable control module; the analogue-to-digital and/or digital-to-analogue conversion module are connected with the user-defined field programmable gate array; and the high speed data transmission module is interconnected with the user-defined field programmable gate array.
    Type: Application
    Filed: December 29, 2017
    Publication date: April 18, 2019
    Applicant: Gowin Semiconductor Corporation
    Inventors: Jinghui Zhu, San-Ta Kow, Tun Jun Gao, Diwakar Chopperla, Chienkuang Chen, Ning Song