Abstract: There is provided a time setting and displaying mode control circuit for an electronic timepiece comprising first and second switches, first and second detection circuits responsive to the operative conditions of the respective first and second switches and first and second ring counters each including a plurality of shift registers and respectively connected to the first and second detection circuits to produce time setting and displaying mode signals, respectively.The content of the first ring counter is shifted in response to an output signal produced from the first detection circuit each time the first switch is depressed in the time setting mode. The content of the second ring counter is shifted in response to an output signal produced from the second detection circuit each time the second switch is depressed in the time displaying mode. When the first switch is depressed under the "hour-minute" displaying mode, the content of the first ring counter is changed to provide the "hour" setting mode.